Presentation 2020-02-26
Defective Chip Prediction Modeling Using Convolutional Neural Networks
Ryunosuke Oka, Satoshi Ohtake, Kouichi Kumaki,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In recent years, the cost of LSI testing which guarantees reliability has relatively increased due to the development of high integration technology and lower prices. So far, method to defective prediction modeling for test cost reduction using data mining techniques such as machine learning has been proposed. This paper propose a method to improve the discrimination accuracy of defective prediction models by applying convolutional neural networks (CNN) which is one of the recent deep learning techniques. We expected to automate complicated data analysis and feature engineering with highly accurate defective prediction by utilizing the feature extraction structure of CNN. In addition, we investigate a new cost reduction method based on defective prediction considering yield rate. The effectiveness of the proposed method is shown by experimental results using actual manufacturing data.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Data mining / LSI testing / Convolutional neural network / Defective prediction
Paper # DC2019-87
Date of Issue 2020-02-19 (DC)

Conference Information
Committee DC
Conference Date 2020/2/26(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair Satoshi Fukumoto(Tokyo Metropolitan Univ.)
Vice Chair Hiroshi Takahashi(Ehime Univ.)
Secretary Hiroshi Takahashi(Nihon Univ.)

Paper Information
Registration To Technical Committee on Dependable Computing
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Defective Chip Prediction Modeling Using Convolutional Neural Networks
Sub Title (in English)
Keyword(1) Data mining
Keyword(2) LSI testing
Keyword(3) Convolutional neural network
Keyword(4) Defective prediction
1st Author's Name Ryunosuke Oka
1st Author's Affiliation Oita University(Oita Univ.)
2nd Author's Name Satoshi Ohtake
2nd Author's Affiliation Oita University(Oita Univ.)
3rd Author's Name Kouichi Kumaki
3rd Author's Affiliation Renesas Electronics Corporation(Renesas)
Date 2020-02-26
Paper # DC2019-87
Volume (vol) vol.119
Number (no) DC-420
Page pp.pp.7-12(DC),
#Pages 6
Date of Issue 2020-02-19 (DC)