Presentation | 2020-01-28 [Invited Talk] Can in-memory/Analog Accelerators be a Silver Bullet for Energy-efficient Inference? Jun Deguchi, Daisuke Miyashita, Asuka Maki, Shinichi Sasaki, Kengo Nakata, Fumihiko Tachibana, Ryuichi Fujimoto, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This presentation introduces and discuss recent trends on in-memory/analog computing for deep learning inference, which was presented as an invited talk at 2019 IEEE International Electron Devices Meeting (IEDM) [1]. A lot of accelerators have been developed for energy-efficient deep learning inference on edge/endpoint devices. Our investigation result on energy efficiency and bit precision of such accelerators shows that energy efficiency of in-memory/analog accelerators looks better than that of typical digital accelerators in a region of lower bit-precision. However, in that region, inference accuracy (e.g. image recognition accuracy) is usually deteriorated. In order to practically reduce average bit precision for weights while maintaining accuracy, we introduce our proposed filter-wise quantization technique [2-3], and a specific hardware architecture [3] mainly for convolutional neural networks. Finally, we discuss whether in-memory/analog accelerators can actually be a silver bullet for energy-efficient inference. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | deep learning / accelerator / convolutional neural network / energy efficiency / quantization / benchmark method |
Paper # | SDM2019-85 |
Date of Issue | 2020-01-21 (SDM) |
Conference Information | |
Committee | SDM |
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Conference Date | 2020/1/28(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Kikai-Shinko-Kaikan Bldg. |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | Takahiro Shinada(Tohoku Univ.) |
Vice Chair | Hiroshige Hirano(TowerJazz Panasonic) |
Secretary | Hiroshige Hirano(Shizuoka Univ.) |
Assistant | Takahiro Mori(AIST) / Nobuaki Kobayashi(Nihon Univ.) |
Paper Information | |
Registration To | Technical Committee on Silicon Device and Materials |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | [Invited Talk] Can in-memory/Analog Accelerators be a Silver Bullet for Energy-efficient Inference? |
Sub Title (in English) | |
Keyword(1) | deep learning |
Keyword(2) | accelerator |
Keyword(3) | convolutional neural network |
Keyword(4) | energy efficiency |
Keyword(5) | quantization |
Keyword(6) | benchmark method |
1st Author's Name | Jun Deguchi |
1st Author's Affiliation | Kioxia Corporation(KIOXIA) |
2nd Author's Name | Daisuke Miyashita |
2nd Author's Affiliation | Kioxia Corporation(KIOXIA) |
3rd Author's Name | Asuka Maki |
3rd Author's Affiliation | Kioxia Corporation(KIOXIA) |
4th Author's Name | Shinichi Sasaki |
4th Author's Affiliation | Kioxia Corporation(KIOXIA) |
5th Author's Name | Kengo Nakata |
5th Author's Affiliation | Kioxia Corporation(KIOXIA) |
6th Author's Name | Fumihiko Tachibana |
6th Author's Affiliation | Kioxia Corporation(KIOXIA) |
7th Author's Name | Ryuichi Fujimoto |
7th Author's Affiliation | Kioxia Corporation(KIOXIA) |
Date | 2020-01-28 |
Paper # | SDM2019-85 |
Volume (vol) | vol.119 |
Number (no) | SDM-397 |
Page | pp.pp.11-11(SDM), |
#Pages | 1 |
Date of Issue | 2020-01-21 (SDM) |