| Presentation | 2020-01-23 ［招待講演］回路による計算の諸側面 Koji Nakano, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This talk reviews research on parallel processing and hardware algorithms for FPGAs that the speaker have been done so far. In particular, we focus on theoretical aspects and practical implementations and show various computational techniques and theoretical analysis of limitations of computational performance. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Hardware Algorithms / Graph Theory / GPU |
| Paper # | VLD2019-79,CPSY2019-77,RECONF2019-69 |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC |
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| Conference Date | 2020/1/22(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Yutaka Tamiya(Fujitsu Lab.) / Yuichiro Shibata(Nagasaki Univ.) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Hiroshi Inoue(Kyushu Univ.) |
| Vice Chair | / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Daisuke Fukuda(Fujitsu Labs.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) |
| Secretary | (Univ. Shiga Prefecture) / Kentaro Sano(NTT) / Yoshiki Yamaguchi(Mitsubishi Electric) / Daisuke Fukuda(Hiroshima City Univ.) / Michihiro Koibuchi(e-trees.Japan) / Kota Nakajima(Univ. of Aizu) / (Hitachi) |
| Assistant | / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Kazuki Ikeda(Hitachi) / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) |
| Paper Information | |
| Registration To | Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture |
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| Language | JPN-ONLY |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Hardware Algorithms |
| Keyword(3) | Graph Theory |
| Keyword(4) | GPU |
| 1st Author's Name | Koji Nakano |
| 1st Author's Affiliation | Hiroshima University(Hiroshima Univ) |
| Date | 2020-01-23 |
| Paper # | VLD2019-79,CPSY2019-77,RECONF2019-69 |
| Volume (vol) | vol.119 |
| Number (no) | VLD-371,CPSY-372,RECONF-373 |
| Page | pp.pp.157-157(VLD), pp.157-157(CPSY), pp.157-157(RECONF), |
| #Pages | 1 |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |