Presentation 2020-01-17
Introduction of Planarized High-speed Standard Process (PHSTP) to CRAVITY Digital Process
Mutsuo Hidaka, Shuichi Nagasawa, Makise Kazumasa,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English)
Paper # SCE2019-71
Date of Issue 2020-01-09 (SCE)

Conference Information
Committee SCE
Conference Date 2020/1/16(2days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair Satoshi Kohjiro(AIST)
Vice Chair
Secretary (Yokohama National Univ.)
Assistant Hiroyuki Akaike(Daido Univ.)

Paper Information
Registration To Technical Committee on Superconductive Electronics
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Introduction of Planarized High-speed Standard Process (PHSTP) to CRAVITY Digital Process
Sub Title (in English)
Keyword(1)
1st Author's Name Mutsuo Hidaka
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
2nd Author's Name Shuichi Nagasawa
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
3rd Author's Name Makise Kazumasa
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
Date 2020-01-17
Paper # SCE2019-71
Volume (vol) vol.119
Number (no) SCE-369
Page pp.pp.165-167(SCE),
#Pages 3
Date of Issue 2020-01-09 (SCE)