| Presentation | 2020-01-24 An FPGA implementation of arc-sine high-radix CORDIC algorithm Hiroshi Matsuoka, Naofumi Takagi, Kazuyoshi Takagi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We consider the realization of the circuit on the FPGA based on the high radix CORDIC algorithm that we proposed for calculating double precision floating point arc-sine. The circuit is consisted of a fixed point conversion unit for input, an initial coordinate vector calculation unit, coordinate vector rotation calculation units, and a floating point conversion unit for output. It is assumed that the iterative calculation is realized by loop unrolling. The circuit is mainly consisted of tables and rectangular multipliers. Assuming realization with Xilinx's Zynq UltraScale + series, we estimate the number of neccesary resources. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | arc-sine / High-Radix / CORDIC / FPGA |
| Paper # | VLD2019-86,CPSY2019-84,RECONF2019-76 |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC |
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| Conference Date | 2020/1/22(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Yutaka Tamiya(Fujitsu Lab.) / Yuichiro Shibata(Nagasaki Univ.) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Hiroshi Inoue(Kyushu Univ.) |
| Vice Chair | / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Daisuke Fukuda(Fujitsu Labs.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) |
| Secretary | (Univ. Shiga Prefecture) / Kentaro Sano(NTT) / Yoshiki Yamaguchi(Mitsubishi Electric) / Daisuke Fukuda(Hiroshima City Univ.) / Michihiro Koibuchi(e-trees.Japan) / Kota Nakajima(Univ. of Aizu) / (Hitachi) |
| Assistant | / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Kazuki Ikeda(Hitachi) / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) |
| Paper Information | |
| Registration To | Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An FPGA implementation of arc-sine high-radix CORDIC algorithm |
| Sub Title (in English) | |
| Keyword(1) | arc-sine |
| Keyword(2) | High-Radix |
| Keyword(3) | CORDIC |
| Keyword(4) | FPGA |
| 1st Author's Name | Hiroshi Matsuoka |
| 1st Author's Affiliation | Kyoto Univercity(Kyoto Univ.) |
| 2nd Author's Name | Naofumi Takagi |
| 2nd Author's Affiliation | Kyoto Univercity(Kyoto Univ.) |
| 3rd Author's Name | Kazuyoshi Takagi |
| 3rd Author's Affiliation | Mie Univercity(Mie Univ.) |
| Date | 2020-01-24 |
| Paper # | VLD2019-86,CPSY2019-84,RECONF2019-76 |
| Volume (vol) | vol.119 |
| Number (no) | VLD-371,CPSY-372,RECONF-373 |
| Page | pp.pp.193-197(VLD), pp.193-197(CPSY), pp.193-197(RECONF), |
| #Pages | 5 |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |