| Presentation | 2020-01-17 [Poster Presentation] Design of Datapath for 8-bit Parallel SFQ Microprocessors with Gate-Level Pipelines Ryota Kashima, Ikki Nagaoka, Masamitsu Tanaka, Kyosuke Sano, Taro Yamashita, Akira Fujimaki, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | |
| Paper # | SCE2019-31 |
| Date of Issue | 2020-01-09 (SCE) |
| Conference Information | |
| Committee | SCE |
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| Conference Date | 2020/1/16(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Satoshi Kohjiro(AIST) |
| Vice Chair | |
| Secretary | (Yokohama National Univ.) |
| Assistant | Hiroyuki Akaike(Daido Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Superconductive Electronics |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | [Poster Presentation] Design of Datapath for 8-bit Parallel SFQ Microprocessors with Gate-Level Pipelines |
| Sub Title (in English) | |
| Keyword(1) | |
| 1st Author's Name | Ryota Kashima |
| 1st Author's Affiliation | Nagoya University(Nagoya Univ.) |
| 2nd Author's Name | Ikki Nagaoka |
| 2nd Author's Affiliation | Nagoya University(Nagoya Univ.) |
| 3rd Author's Name | Masamitsu Tanaka |
| 3rd Author's Affiliation | Nagoya University(Nagoya Univ.) |
| 4th Author's Name | Kyosuke Sano |
| 4th Author's Affiliation | Nagoya University(Nagoya Univ.) |
| 5th Author's Name | Taro Yamashita |
| 5th Author's Affiliation | Nagoya University(Nagoya Univ.) |
| 6th Author's Name | Akira Fujimaki |
| 6th Author's Affiliation | Nagoya University(Nagoya Univ.) |
| Date | 2020-01-17 |
| Paper # | SCE2019-31 |
| Volume (vol) | vol.119 |
| Number (no) | SCE-369 |
| Page | pp.pp.5-9(SCE), |
| #Pages | 5 |
| Date of Issue | 2020-01-09 (SCE) |