| Presentation | 2020-01-22 An FPGA Implementation of Monocular Depth Estimation Youki Sada, Masayuki Shimoda, Shimpei Sato, Hiroki Nakahara, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Among a lot of image recognition applications, Convolutional Neural Network (CNN) has gained high accuracy and increasing interest. It is rapidly required to implement a real-time and energy-efficient depth estimation in embedded systems. Because depth estimation is important to understand the scene and it is required on many applications such as robotics, 3D modeling and driving automation systems. The monocular depth estimation estimates the depth from a single RGB image. And it is paid attention due to the reliability of a monocular RGB camera, low cost and its small requirement of hardware resource. Moreover, there is the possibility to replace an expensive depth sensor such as a LiDAR or a stereo camera into the general RGB camera. We choose the CNN-based monocular depth estimation since CNN schemes are able to realize accurate and dense estimation. However, CNN schemes require a massive amount of multiplications and it makes difficult to implement an accurate system under limited device resources. To handle this, we adopt 8-bit quantization and weight pruning in order to implement an FPGA with high inference speed. Then, our CNN-based estimation is demonstrated on OpenVINO Starter Kit due to real-time requirements and energy-efficiency. Because GPUs consume too much of power and CPUs are too slow due to the numerous operations in the CNN, FPGA system is better performance per power using a custom design for the depth estimation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Convolutional Neural Network / FPGA / Monocular Depth Estimation / Quantization / Pruning |
| Paper # | VLD2019-66,CPSY2019-64,RECONF2019-56 |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC |
|---|---|
| Conference Date | 2020/1/22(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Yutaka Tamiya(Fujitsu Lab.) / Yuichiro Shibata(Nagasaki Univ.) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Hiroshi Inoue(Kyushu Univ.) |
| Vice Chair | / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Daisuke Fukuda(Fujitsu Labs.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) |
| Secretary | (Univ. Shiga Prefecture) / Kentaro Sano(NTT) / Yoshiki Yamaguchi(Mitsubishi Electric) / Daisuke Fukuda(Hiroshima City Univ.) / Michihiro Koibuchi(e-trees.Japan) / Kota Nakajima(Univ. of Aizu) / (Hitachi) |
| Assistant | / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Kazuki Ikeda(Hitachi) / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) |
| Paper Information | |
| Registration To | Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An FPGA Implementation of Monocular Depth Estimation |
| Sub Title (in English) | |
| Keyword(1) | Convolutional Neural Network |
| Keyword(2) | FPGA |
| Keyword(3) | Monocular Depth Estimation |
| Keyword(4) | Quantization |
| Keyword(5) | Pruning |
| 1st Author's Name | Youki Sada |
| 1st Author's Affiliation | Tokyo Institute of Technology(titech) |
| 2nd Author's Name | Masayuki Shimoda |
| 2nd Author's Affiliation | Tokyo Institute of Technology(titech) |
| 3rd Author's Name | Shimpei Sato |
| 3rd Author's Affiliation | Tokyo Institute of Technology(titech) |
| 4th Author's Name | Hiroki Nakahara |
| 4th Author's Affiliation | Tokyo Institute of Technology(titech) |
| Date | 2020-01-22 |
| Paper # | VLD2019-66,CPSY2019-64,RECONF2019-56 |
| Volume (vol) | vol.119 |
| Number (no) | VLD-371,CPSY-372,RECONF-373 |
| Page | pp.pp.73-78(VLD), pp.73-78(CPSY), pp.73-78(RECONF), |
| #Pages | 6 |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |