Presentation 2020-01-22
Performance Evaluation of Using Multi-Switch on a Multi-FPGA System
Kohei Ito, Kensuke Iizuka, Yugo Yamauchi, Kazuei Hironaka, Yao Hu, Michihiro Koibuchi, Hideharu Amano,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Flow-in-Cloud(FiC) is a system which consists of multiple middle-range FPGAs connected by high-speed serial links, and is developed to execute applications such as deep learning in the cloud or multi-access edge computing. On the FiC, a large application which cannot be implemented on a single FPGA can be implemented by using multiple FPGAs and divided application, so it is possible to scale at cost-efficiently than using a single high-end FPGA. In this paper, we use four Static Time Division Multiplexing(STDM) switches implemented on each FiC board by Link Aggregation method which can increase the bandwidth by operating all switches in the same way, and by Slot Distribution method which can reduce slots by operating each switch individually. And we implemented an application using the above two different methods. As a result, we can improve the communication performance up to 2.76 times by using four switches compared to only one switch.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) multi-FPGA / STDM switch / FPGA-in-cloud
Paper # VLD2019-60,CPSY2019-58,RECONF2019-50
Date of Issue 2020-01-15 (VLD, CPSY, RECONF)

Conference Information
Committee IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC
Conference Date 2020/1/22(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Raiosha, Hiyoshi Campus, Keio University
Topics (in Japanese) (See Japanese page)
Topics (in English) FPGA Applications, etc.
Chair Yutaka Tamiya(Fujitsu Lab.) / Yuichiro Shibata(Nagasaki Univ.) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Hiroshi Inoue(Kyushu Univ.)
Vice Chair / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Daisuke Fukuda(Fujitsu Labs.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.)
Secretary (Univ. Shiga Prefecture) / Kentaro Sano(NTT) / Yoshiki Yamaguchi(Mitsubishi Electric) / Daisuke Fukuda(Hiroshima City Univ.) / Michihiro Koibuchi(e-trees.Japan) / Kota Nakajima(Univ. of Aizu) / (Hitachi)
Assistant / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Kazuki Ikeda(Hitachi) / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi)

Paper Information
Registration To Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Performance Evaluation of Using Multi-Switch on a Multi-FPGA System
Sub Title (in English)
Keyword(1) multi-FPGA
Keyword(2) STDM switch
Keyword(3) FPGA-in-cloud
1st Author's Name Kohei Ito
1st Author's Affiliation Keio University(Keio Univ.)
2nd Author's Name Kensuke Iizuka
2nd Author's Affiliation Keio University(Keio Univ.)
3rd Author's Name Yugo Yamauchi
3rd Author's Affiliation Keio University(Keio Univ.)
4th Author's Name Kazuei Hironaka
4th Author's Affiliation Keio University(Keio Univ.)
5th Author's Name Yao Hu
5th Author's Affiliation National Institute of Informaitc(NII)
6th Author's Name Michihiro Koibuchi
6th Author's Affiliation National Institute of Informaitc(NII)
7th Author's Name Hideharu Amano
7th Author's Affiliation Keio University(Keio Univ.)
Date 2020-01-22
Paper # VLD2019-60,CPSY2019-58,RECONF2019-50
Volume (vol) vol.119
Number (no) VLD-371,CPSY-372,RECONF-373
Page pp.pp.37-42(VLD), pp.37-42(CPSY), pp.37-42(RECONF),
#Pages 6
Date of Issue 2020-01-15 (VLD, CPSY, RECONF)