| Presentation | 2020-01-22 Implementation and Evaluation of a Router on a Multi-FPGA System Tomoki Shimizu, Kohei Ito, Kensuke Iizuka, Yugo Yamauchi, Kazuei Hironaka, Hideharu Amano, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The trade-off between power efficiency and performance is important in large-scale computing systems like a datacenter. Multi-FPGA system which is consisted of FPGAs connected by direct serial links has scalability and is able to realize high performance by low power. In this research, we developed and implemented a packet-switching router on Multi-FPGA System, FiC(Flow-in-Cloud). This system consists of middle-range FPGAs. We evaluated the communication performance of the packet-switching router on FiC system and compared the performance between this router and STDM-Switch which is operated on the current FiC system. In conclusion, We confirm that the packet-switching router is better than STDM-Switch which has more than 2 time slots. Moreover, we observed 24 FPGAs FiC system using packet-switch router performs 1.73 times faster than the same system using STDM-Switch in conjugate gradient method execution in a matrix of 384 by 384. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Multi-FPGA / Router / Evaluation / STDM-Switch / FPGA-in-Cloud |
| Paper # | VLD2019-59,CPSY2019-57,RECONF2019-49 |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC |
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| Conference Date | 2020/1/22(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Yutaka Tamiya(Fujitsu Lab.) / Yuichiro Shibata(Nagasaki Univ.) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Hiroshi Inoue(Kyushu Univ.) |
| Vice Chair | / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Daisuke Fukuda(Fujitsu Labs.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) |
| Secretary | (Univ. Shiga Prefecture) / Kentaro Sano(NTT) / Yoshiki Yamaguchi(Mitsubishi Electric) / Daisuke Fukuda(Hiroshima City Univ.) / Michihiro Koibuchi(e-trees.Japan) / Kota Nakajima(Univ. of Aizu) / (Hitachi) |
| Assistant | / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Kazuki Ikeda(Hitachi) / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) |
| Paper Information | |
| Registration To | Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation and Evaluation of a Router on a Multi-FPGA System |
| Sub Title (in English) | |
| Keyword(1) | Multi-FPGA |
| Keyword(2) | Router |
| Keyword(3) | Evaluation |
| Keyword(4) | STDM-Switch |
| Keyword(5) | FPGA-in-Cloud |
| 1st Author's Name | Tomoki Shimizu |
| 1st Author's Affiliation | Keio University(Keio Univ.) |
| 2nd Author's Name | Kohei Ito |
| 2nd Author's Affiliation | Keio University(Keio Univ.) |
| 3rd Author's Name | Kensuke Iizuka |
| 3rd Author's Affiliation | Keio University(Keio Univ.) |
| 4th Author's Name | Yugo Yamauchi |
| 4th Author's Affiliation | Keio University(Keio Univ.) |
| 5th Author's Name | Kazuei Hironaka |
| 5th Author's Affiliation | Keio University(Keio Univ.) |
| 6th Author's Name | Hideharu Amano |
| 6th Author's Affiliation | Keio University(Keio Univ.) |
| Date | 2020-01-22 |
| Paper # | VLD2019-59,CPSY2019-57,RECONF2019-49 |
| Volume (vol) | vol.119 |
| Number (no) | VLD-371,CPSY-372,RECONF-373 |
| Page | pp.pp.31-36(VLD), pp.31-36(CPSY), pp.31-36(RECONF), |
| #Pages | 6 |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |