Presentation | 2020-01-22 A Comparison of Filter for Convolutional Neural Network towards Hardware Implementation Kosuke Akimoto, Youki Sada, Shimpei Sato, Hiroki Hakahara, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Convolutional neural networks have high recognition accuracy in computer vision task, and many of the learned filters are known to be similar to gabor filters. For the purpose of constructing a model that is robust to the orientation and scale of the input image, a method that uses a gabor filter for convolution processing has already been proposed. Also, a channel shift appoximation has been proposed. In this paper, we compare a light-weight convolution toward a dedicated CNN accelerator. This paper proposes a design method for FPGAs that performs computations with lower power consumption and lower latency than GPUs for device applications. Since we reuse the batch normalization circuit, there is no computational resource overhead for convolution operations using Gabor filters. We implement the proposed CNN on ZCU104 evaluation board by using Xilinx SDSoC 2018.2.2 and CamVid dataset. The experimental results show that there is no increase of FPGA area with 1.3 point better accuracy (mIoU) compared to a conventional MobileNet. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Convolutional Neural Network / Gabor Filter / MobileNet / ShiftNet / FPGA / Semantic Segmentation |
Paper # | VLD2019-64,CPSY2019-62,RECONF2019-54 |
Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |
Conference Information | |
Committee | IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC |
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Conference Date | 2020/1/22(3days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | FPGA Applications, etc. |
Chair | Yutaka Tamiya(Fujitsu Lab.) / Yuichiro Shibata(Nagasaki Univ.) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Hiroshi Inoue(Kyushu Univ.) |
Vice Chair | / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Daisuke Fukuda(Fujitsu Labs.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) |
Secretary | (Univ. Shiga Prefecture) / Kentaro Sano(NTT) / Yoshiki Yamaguchi(Mitsubishi Electric) / Daisuke Fukuda(Hiroshima City Univ.) / Michihiro Koibuchi(e-trees.Japan) / Kota Nakajima(Univ. of Aizu) / (Hitachi) |
Assistant | / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Kazuki Ikeda(Hitachi) / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) |
Paper Information | |
Registration To | Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Comparison of Filter for Convolutional Neural Network towards Hardware Implementation |
Sub Title (in English) | |
Keyword(1) | Convolutional Neural Network |
Keyword(2) | Gabor Filter |
Keyword(3) | MobileNet |
Keyword(4) | ShiftNet |
Keyword(5) | FPGA |
Keyword(6) | Semantic Segmentation |
1st Author's Name | Kosuke Akimoto |
1st Author's Affiliation | Tokyo Institute of Technology(Tokyo Tech) |
2nd Author's Name | Youki Sada |
2nd Author's Affiliation | Tokyo Institute of Technology(Tokyo Tech) |
3rd Author's Name | Shimpei Sato |
3rd Author's Affiliation | Tokyo Institute of Technology(Tokyo Tech) |
4th Author's Name | Hiroki Hakahara |
4th Author's Affiliation | Tokyo Institute of Technology(Tokyo Tech) |
Date | 2020-01-22 |
Paper # | VLD2019-64,CPSY2019-62,RECONF2019-54 |
Volume (vol) | vol.119 |
Number (no) | VLD-371,CPSY-372,RECONF-373 |
Page | pp.pp.61-66(VLD), pp.61-66(CPSY), pp.61-66(RECONF), |
#Pages | 6 |
Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |