Presentation 2020-01-22
Increasing Test Variation for C Compilers by Equivalent Mutant Generation
Hiroki Maeda, Nagisa ishiura,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This article proposes a method of increasing variation of test programs in automatic testing of C compilers by means of equivalent mutant generation. A mutation-based method, where test programs are generated by mutating existing test programs, has different merits from a grammar-based generation method, especially when seed test programs are properly chosen. One of the challenges for the mutation-based method is that applicable mutations have been limited because the mutations must not induce undefined behavior in test programs. This article introduces new types of mutations by bookkeeping the values of all the variables in seed test programs. Our new mutations generate equivalent test programs from a seed program in a sense that all the variable updates are done with the same values both in the seed and mutated programs. The mutations are based on 1) replacement of types and modifiers of variables, 2) interchange among scalar variables, array elements, and struct members, and 3) nesting statements with conditional and loop constructs. A test system based on the proposed method has detected bugs in GCC-5.5.0 and LLVM/Clang-3.5.2 by test programs which can not be generated by existing methods.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) compiler / automatic testing / equivalent mutant
Paper # VLD2019-61,CPSY2019-59,RECONF2019-51
Date of Issue 2020-01-15 (VLD, CPSY, RECONF)

Conference Information
Committee IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC
Conference Date 2020/1/22(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Raiosha, Hiyoshi Campus, Keio University
Topics (in Japanese) (See Japanese page)
Topics (in English) FPGA Applications, etc.
Chair Yutaka Tamiya(Fujitsu Lab.) / Yuichiro Shibata(Nagasaki Univ.) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Hiroshi Inoue(Kyushu Univ.)
Vice Chair / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Daisuke Fukuda(Fujitsu Labs.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.)
Secretary (Univ. Shiga Prefecture) / Kentaro Sano(NTT) / Yoshiki Yamaguchi(Mitsubishi Electric) / Daisuke Fukuda(Hiroshima City Univ.) / Michihiro Koibuchi(e-trees.Japan) / Kota Nakajima(Univ. of Aizu) / (Hitachi)
Assistant / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Kazuki Ikeda(Hitachi) / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi)

Paper Information
Registration To Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Increasing Test Variation for C Compilers by Equivalent Mutant Generation
Sub Title (in English)
Keyword(1) compiler
Keyword(2) automatic testing
Keyword(3) equivalent mutant
1st Author's Name Hiroki Maeda
1st Author's Affiliation Kwansei Gakuin University(Kwansei Gakuin Univ.)
2nd Author's Name Nagisa ishiura
2nd Author's Affiliation Kwansei Gakuin University(Kwansei Gakuin Univ.)
Date 2020-01-22
Paper # VLD2019-61,CPSY2019-59,RECONF2019-51
Volume (vol) vol.119
Number (no) VLD-371,CPSY-372,RECONF-373
Page pp.pp.43-48(VLD), pp.43-48(CPSY), pp.43-48(RECONF),
#Pages 6
Date of Issue 2020-01-15 (VLD, CPSY, RECONF)