Presentation 2019-11-28
Optimization of Parallel Prefix Adder Structure Generated by Insertion Operations
Mineo Kaneko,
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Abstract(in English)
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Keyword(in English)
Paper # CAS2019-48,MSS2019-27
Date of Issue 2019-11-21 (CAS, MSS)

Conference Information
Committee CAS / MSS / IPSJ-AL
Conference Date 2019/11/28(2days)
Place (in Japanese) (See Japanese page)
Place (in English)
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Chair Taizo Yamawaki(Hitachi) / Shigemasa Takai(Osaka Univ.) / 瀧本 英二(九大)
Vice Chair Yasuhiro Takashima(Univ. of Kitakyushu) / Atsuo Ozaki(Osaka Inst. of Tech.)
Secretary Yasuhiro Takashima(Hitachi) / Atsuo Ozaki(Yamanashi Univ.) / (Osaka Univ.)
Assistant Hiroki Sato(Sony LSI Design) / Motoi Yamaguchi(Renesas Electronics) / Naoki Hayashi(Osaka Univ.)

Paper Information
Registration To Technical Committee on Circuits and Systems / Technical Committee on Mathematical Systems Science and its applications / Special Interest Group on Algorithms
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Optimization of Parallel Prefix Adder Structure Generated by Insertion Operations
Sub Title (in English)
Keyword(1)
1st Author's Name Mineo Kaneko
1st Author's Affiliation Japan Advanced Institute of Science and Technology(JAIST)
Date 2019-11-28
Paper # CAS2019-48,MSS2019-27
Volume (vol) vol.119
Number (no) CAS-313,MSS-314
Page pp.pp.21-26(CAS), pp.21-26(MSS),
#Pages 6
Date of Issue 2019-11-21 (CAS, MSS)