| Presentation | 2019-11-01 Fundamental study on an estimation method of output bits from TERO-based TRNG during frequency injection attack Saki Osuka, Daisuke Fujimoto, Yuichi Hayashi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | True random number generators (TRNGs) based on ring oscillators (ROs) are employed in many devices because they can be constructed by logic gates. If a RO-based TRNG is attacked and the randomness is reduced, the system security is affected. As physical attacks on the TRNG, conventional studies mainly focused on reducing the uniformity of random numbers. On the other hand, the feasibility of an attack against the unpredictability of random numbers, which is one of the requirements for randomness, has not been fully discussed. If some of the output bits can be estimated, the entropy of random numbers used for security can be significantly reduced, which is a serious security threat. In this paper, we investigated the possibility of an attack against the unpredictability of TRNG. Specifically, we evaluated the feasibility of estimating the output bits by using the frequency injection attack, which is used to degrade uniformity, and observing changes in TRNG operation caused by attacks. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | True random number generator / Side-channel attack |
| Paper # | HWS2019-62,ICD2019-23 |
| Date of Issue | 2019-10-25 (HWS, ICD) |
| Conference Information | |
| Committee | HWS / ICD |
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| Conference Date | 2019/11/1(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | DNP Namba SS Bld. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Hardware Security, etc. |
| Chair | Shinichi Kawamura(Toshiba) / Makoto Nagata(Kobe Univ.) |
| Vice Chair | Makoto Ikeda(Univ. of Tokyo) / Yasuhisa Shimazaki(Renesas Electronics) / Masafumi Takahashi(Toshiba-memory) |
| Secretary | Makoto Ikeda(SECOM) / Yasuhisa Shimazaki(Kyushu Univ.) / Masafumi Takahashi(Tohoku Univ.) |
| Assistant | / Tetsuya Hirose(Osaka Univ.) / Koji Nii(Floadia) / Takeshi Kuboki(Kyushu Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on Integrated Circuits and Devices |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Fundamental study on an estimation method of output bits from TERO-based TRNG during frequency injection attack |
| Sub Title (in English) | |
| Keyword(1) | True random number generator |
| Keyword(2) | Side-channel attack |
| 1st Author's Name | Saki Osuka |
| 1st Author's Affiliation | Nara Institute Science and Technology(NAIST) |
| 2nd Author's Name | Daisuke Fujimoto |
| 2nd Author's Affiliation | Nara Institute Science and Technology(NAIST) |
| 3rd Author's Name | Yuichi Hayashi |
| 3rd Author's Affiliation | Nara Institute Science and Technology(NAIST) |
| Date | 2019-11-01 |
| Paper # | HWS2019-62,ICD2019-23 |
| Volume (vol) | vol.119 |
| Number (no) | HWS-260,ICD-261 |
| Page | pp.pp.29-34(HWS), pp.29-34(ICD), |
| #Pages | 6 |
| Date of Issue | 2019-10-25 (HWS, ICD) |