| Presentation | 2019-11-14 Analysis of Fault Detection Degradation Issue in Multi-cycle Test Scheme using Probabilistic Evaluation Method Norihiro Nakaoka, Tomoki Aono, Sohshi Kudoh, Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In order to ensure the functional safety of advanced autonomous driving systems, a power-on self-test(POST) is required to diagnose the presence or absence of a device fault by using a logical built-in self-test (LBIST) mechanism at system startup. We must obtain a fault detection rate defined under strict test execution timeconstraints. Multi-cycle testing is one of the effective methods for shortening POST execution time using LBIST. However, in the multi-cycle test, there was a fault detection degradation problem that made it difficult for thecapture pattern to detect a new stuck-at fault as the number of capture cycles increased. Regarding the cause ofthe fault detection degradation problem, it has been found that many flip-flops (FF) values become fixed as thenumber of cycles increases in multi-cycle tests by performing logic / fault simulations. The relationship betweensuch a problem and fault detection has not yet been clarified. In this paper, we analyze the mechanism of thefault detection degradation problem by evaluating the transition probability and fault detection probability of thecapture pattern sequence in the multi-cycle test scheme using a probability-based testability evaluation scale calledCOP. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | POST / LBIST / Multi-cycle Testing / Function Safety / Stuck-at Fault |
| Paper # | VLD2019-45,DC2019-69 |
| Date of Issue | 2019-11-06 (VLD, DC) |
| Conference Information | |
| Committee | VLD / DC / CPSY / RECONF / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC |
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| Conference Date | 2019/11/13(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Ehime Prefecture Gender Equality Center |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2019 -New Field of VLSI Design- |
| Chair | Nozomu Togawa(Waseda Univ.) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Yuichiro Shibata(Nagasaki Univ.) / Makoto Nagata(Kobe Univ.) / Hideaki Kimata(NTT) / Yutaka Tamiya(Fujitsu Lab.) / / Hiroshi Inoue(Kyushu Univ.) |
| Vice Chair | Daisuke Fukuda(Fujitsu Labs.) / Hiroshi Takahashi(Ehime Univ.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Masafumi Takahashi(Toshiba-memory) / Kazuya Kodama(NII) / Keita Takahashi(Nagoya Univ.) |
| Secretary | Daisuke Fukuda(Univ. of Aizu) / Hiroshi Takahashi(Hitachi) / Michihiro Koibuchi(Nihon Univ.) / Kota Nakajima(Chiba Univ.) / Kentaro Sano(Nagoya Inst. of Tech.) / Yoshiki Yamaguchi(Hokkaido Univ.) / Masafumi Takahashi(Hiroshima City Univ.) / Kazuya Kodama(e-trees.Japan) / Keita Takahashi(Tohoku Univ.) / (Socionext) / (NTT) / (NHK) |
| Assistant | Kazuki Ikeda(Hitachi) / / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Tetsuya Hirose(Osaka Univ.) / Koji Nii(Floadia) / Takeshi Kuboki(Kyushu Univ.) / Kyohei Unno(KDDI Research) / Norishige Fukushima(Nagoya Inst. of Tech.) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Analysis of Fault Detection Degradation Issue in Multi-cycle Test Scheme using Probabilistic Evaluation Method |
| Sub Title (in English) | |
| Keyword(1) | POST |
| Keyword(2) | LBIST |
| Keyword(3) | Multi-cycle Testing |
| Keyword(4) | Function Safety |
| Keyword(5) | Stuck-at Fault |
| 1st Author's Name | Norihiro Nakaoka |
| 1st Author's Affiliation | Ehime University(Ehime Univ.) |
| 2nd Author's Name | Tomoki Aono |
| 2nd Author's Affiliation | Ehime University(Ehime Univ.) |
| 3rd Author's Name | Sohshi Kudoh |
| 3rd Author's Affiliation | Ehime University(Ehime Univ.) |
| 4th Author's Name | Senling Wang |
| 4th Author's Affiliation | Ehime University(Ehime Univ.) |
| 5th Author's Name | Yoshinobu Higami |
| 5th Author's Affiliation | Ehime University(Ehime Univ.) |
| 6th Author's Name | Hiroshi Takahashi |
| 6th Author's Affiliation | Ehime University(Ehime Univ.) |
| 7th Author's Name | Hiroyuki Iwata |
| 7th Author's Affiliation | Renesas Electronics Corporation(Renesas) |
| 8th Author's Name | Yoichi Maeda |
| 8th Author's Affiliation | Renesas Electronics Corporation(Renesas) |
| 9th Author's Name | Jun Matsushima |
| 9th Author's Affiliation | Renesas Electronics Corporation(Renesas) |
| Date | 2019-11-14 |
| Paper # | VLD2019-45,DC2019-69 |
| Volume (vol) | vol.119 |
| Number (no) | VLD-282,DC-283 |
| Page | pp.pp.145-150(VLD), pp.145-150(DC), |
| #Pages | 6 |
| Date of Issue | 2019-11-06 (VLD, DC) |