Presentation | 2019-11-15 Low Latency Interrupt Handling Scheme By Using Interrupt Wake-Up Mechanism Ryo Wada, Nobuyuki Yamasaki, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Recently, embedded real-time systems used in spacecraft and automobiles have become increasingly complex and are required to be able to handle both periodic and aperiodic tasks. When an interrupt occurs, the program counter generally shifts to the corresponding exception vector and systems incur large overhead due to context switching. In this paper, we design and implement a software mechanism to reduce the interrupt response time for improving system reliability and demonstrate the effectiveness of our proposed method by RTL simulations. The evaluation results show that our proposed method achieves high real-time performance by reducing the interrupt response time by up to 88% compared to the existing interrupt processing. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Embedded Real-Time System / SMT / Interruption / Interrupt Wake-Up |
Paper # | CPSY2019-50 |
Date of Issue | 2019-11-07 (CPSY) |
Conference Information | |
Committee | VLD / DC / CPSY / RECONF / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC |
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Conference Date | 2019/11/13(3days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Ehime Prefecture Gender Equality Center |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | Design Gaia 2019 -New Field of VLSI Design- |
Chair | Nozomu Togawa(Waseda Univ.) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Yuichiro Shibata(Nagasaki Univ.) / Makoto Nagata(Kobe Univ.) / Hideaki Kimata(NTT) / Yutaka Tamiya(Fujitsu Lab.) / / Hiroshi Inoue(Kyushu Univ.) |
Vice Chair | Daisuke Fukuda(Fujitsu Labs.) / Hiroshi Takahashi(Ehime Univ.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Masafumi Takahashi(Toshiba-memory) / Kazuya Kodama(NII) / Keita Takahashi(Nagoya Univ.) |
Secretary | Daisuke Fukuda(Univ. of Aizu) / Hiroshi Takahashi(Hitachi) / Michihiro Koibuchi(Nihon Univ.) / Kota Nakajima(Chiba Univ.) / Kentaro Sano(Nagoya Inst. of Tech.) / Yoshiki Yamaguchi(Hokkaido Univ.) / Masafumi Takahashi(Hiroshima City Univ.) / Kazuya Kodama(e-trees.Japan) / Keita Takahashi(Tohoku Univ.) / (Socionext) / (NTT) / (NHK) |
Assistant | Kazuki Ikeda(Hitachi) / / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Tetsuya Hirose(Osaka Univ.) / Koji Nii(Floadia) / Takeshi Kuboki(Kyushu Univ.) / Kyohei Unno(KDDI Research) / Norishige Fukushima(Nagoya Inst. of Tech.) |
Paper Information | |
Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Low Latency Interrupt Handling Scheme By Using Interrupt Wake-Up Mechanism |
Sub Title (in English) | |
Keyword(1) | Embedded Real-Time System |
Keyword(2) | SMT |
Keyword(3) | Interruption |
Keyword(4) | Interrupt Wake-Up |
1st Author's Name | Ryo Wada |
1st Author's Affiliation | Keio University(Keio Univ.) |
2nd Author's Name | Nobuyuki Yamasaki |
2nd Author's Affiliation | Keio University(Keio Univ.) |
Date | 2019-11-15 |
Paper # | CPSY2019-50 |
Volume (vol) | vol.119 |
Number (no) | CPSY-286 |
Page | pp.pp.71-76(CPSY), |
#Pages | 6 |
Date of Issue | 2019-11-07 (CPSY) |