Presentation 2019-11-15
Design of optimal NV-memory configuration for hybrid SSD with QLC NAND flash memory
Yoshiki Takai, Mamoru Fukuchi, Chihiro Matsui, Reika Kinoshita, Ken Takeuchi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In order to expand capacity and reduce cost of NAND flash memory, the number of bits per cell has been increased. However, as the number of bits per cell increases, read and write latency become longer. Recently, quadruple-level cell (QLC) NAND flash that stores four bits per cell has been put into market. QLC NAND flash has the largest capacity and the lowest cost but lowest performance in NAND flash memories. On the other hand, storage class memories with higher performance and cost than NAND flash have been developed. Focusing on QLC NAND flash, hybrid SSDs configured with these non-volatile memories are evaluated by simulation, and optimal non-volatile memory configuration is analyzed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) QLC NAND flash memory / Storage class memory / Hybrid SSD
Paper # ICD2019-41,IE2019-47
Date of Issue 2019-11-07 (ICD, IE)

Conference Information
Committee VLD / DC / CPSY / RECONF / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2019/11/13(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Ehime Prefecture Gender Equality Center
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2019 -New Field of VLSI Design-
Chair Nozomu Togawa(Waseda Univ.) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Yuichiro Shibata(Nagasaki Univ.) / Makoto Nagata(Kobe Univ.) / Hideaki Kimata(NTT) / Yutaka Tamiya(Fujitsu Lab.) / / Hiroshi Inoue(Kyushu Univ.)
Vice Chair Daisuke Fukuda(Fujitsu Labs.) / Hiroshi Takahashi(Ehime Univ.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Masafumi Takahashi(Toshiba-memory) / Kazuya Kodama(NII) / Keita Takahashi(Nagoya Univ.)
Secretary Daisuke Fukuda(Univ. of Aizu) / Hiroshi Takahashi(Hitachi) / Michihiro Koibuchi(Nihon Univ.) / Kota Nakajima(Chiba Univ.) / Kentaro Sano(Nagoya Inst. of Tech.) / Yoshiki Yamaguchi(Hokkaido Univ.) / Masafumi Takahashi(Hiroshima City Univ.) / Kazuya Kodama(e-trees.Japan) / Keita Takahashi(Tohoku Univ.) / (Socionext) / (NTT) / (NHK)
Assistant Kazuki Ikeda(Hitachi) / / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Tetsuya Hirose(Osaka Univ.) / Koji Nii(Floadia) / Takeshi Kuboki(Kyushu Univ.) / Kyohei Unno(KDDI Research) / Norishige Fukushima(Nagoya Inst. of Tech.)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of optimal NV-memory configuration for hybrid SSD with QLC NAND flash memory
Sub Title (in English)
Keyword(1) QLC NAND flash memory
Keyword(2) Storage class memory
Keyword(3) Hybrid SSD
1st Author's Name Yoshiki Takai
1st Author's Affiliation Chuo University(Chuo Univ.)
2nd Author's Name Mamoru Fukuchi
2nd Author's Affiliation Chuo University(Chuo Univ.)
3rd Author's Name Chihiro Matsui
3rd Author's Affiliation Chuo University(Chuo Univ.)
4th Author's Name Reika Kinoshita
4th Author's Affiliation Chuo University(Chuo Univ.)
5th Author's Name Ken Takeuchi
5th Author's Affiliation Chuo University(Chuo Univ.)
Date 2019-11-15
Paper # ICD2019-41,IE2019-47
Volume (vol) vol.119
Number (no) ICD-284,IE-285
Page pp.pp.59-63(ICD), pp.59-63(IE),
#Pages 5
Date of Issue 2019-11-07 (ICD, IE)