Presentation 2019-11-15
Evaluation of Inter-chip Inductive Coupling Wireless Communication Technology
Hideto Kayashima, Takuya Kojima, Hayate Okuhara, Tsunaaki Shidei, Hideharu Amano,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Building block computing systems, which is one of the three-dimensional stacked LSI systems, use a wireless communication interface TCI (Through Chip Interface) using electromagnetic induction between coils as an inter-chip communication technology. In order to measure the operating characteristics of this TCI, we evaluated the characteristics using an operation veri cation chip TCI Tester. As a result, TCI operates stably with high reliability, but its performance is lower than the design value. Possible causes include power grid degradation when incorporating as IP, and the power I/O is poor due to the stacking, and the Renesas SOTB process is changed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Building block computing system / ThruChip Interface / 3-D stacked VLSIs
Paper # CPSY2019-48
Date of Issue 2019-11-07 (CPSY)

Conference Information
Committee VLD / DC / CPSY / RECONF / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2019/11/13(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Ehime Prefecture Gender Equality Center
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2019 -New Field of VLSI Design-
Chair Nozomu Togawa(Waseda Univ.) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Yuichiro Shibata(Nagasaki Univ.) / Makoto Nagata(Kobe Univ.) / Hideaki Kimata(NTT) / Yutaka Tamiya(Fujitsu Lab.) / / Hiroshi Inoue(Kyushu Univ.)
Vice Chair Daisuke Fukuda(Fujitsu Labs.) / Hiroshi Takahashi(Ehime Univ.) / Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Masafumi Takahashi(Toshiba-memory) / Kazuya Kodama(NII) / Keita Takahashi(Nagoya Univ.)
Secretary Daisuke Fukuda(Univ. of Aizu) / Hiroshi Takahashi(Hitachi) / Michihiro Koibuchi(Nihon Univ.) / Kota Nakajima(Chiba Univ.) / Kentaro Sano(Nagoya Inst. of Tech.) / Yoshiki Yamaguchi(Hokkaido Univ.) / Masafumi Takahashi(Hiroshima City Univ.) / Kazuya Kodama(e-trees.Japan) / Keita Takahashi(Tohoku Univ.) / (Socionext) / (NTT) / (NHK)
Assistant Kazuki Ikeda(Hitachi) / / Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Tetsuya Hirose(Osaka Univ.) / Koji Nii(Floadia) / Takeshi Kuboki(Kyushu Univ.) / Kyohei Unno(KDDI Research) / Norishige Fukushima(Nagoya Inst. of Tech.)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Evaluation of Inter-chip Inductive Coupling Wireless Communication Technology
Sub Title (in English)
Keyword(1) Building block computing system
Keyword(2) ThruChip Interface
Keyword(3) 3-D stacked VLSIs
1st Author's Name Hideto Kayashima
1st Author's Affiliation Keio University(Keio Univ.)
2nd Author's Name Takuya Kojima
2nd Author's Affiliation Keio University(Keio Univ.)
3rd Author's Name Hayate Okuhara
3rd Author's Affiliation Keio University(Keio Univ.)
4th Author's Name Tsunaaki Shidei
4th Author's Affiliation Keio University(Keio Univ.)
5th Author's Name Hideharu Amano
5th Author's Affiliation Keio University(Keio Univ.)
Date 2019-11-15
Paper # CPSY2019-48
Volume (vol) vol.119
Number (no) CPSY-286
Page pp.pp.59-64(CPSY),
#Pages 6
Date of Issue 2019-11-07 (CPSY)