Presentation 2019-08-09
Evaluating bit error rate of adiabatic quantum flux parametron circuit considering gate-to-gate interconnection
Ito Daiki, Takeuchi Naoki, Yamanashi Yuki, Yoshikawa Nobuyuki,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English)
Paper # SCE2019-21
Date of Issue 2019-08-02 (SCE)

Conference Information
Committee SCE
Conference Date 2019/8/9(1days)
Place (in Japanese) (See Japanese page)
Place (in English) National Institute of Advanced Industrial Science and Technology
Topics (in Japanese) (See Japanese page)
Topics (in English) Device, think film, etc.
Chair Satoshi Kohjiro(AIST)
Vice Chair
Secretary (Yokohama National Univ.)
Assistant Hiroyuki Akaike(Daido Univ.)

Paper Information
Registration To Technical Committee on Superconductive Electronics
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Evaluating bit error rate of adiabatic quantum flux parametron circuit considering gate-to-gate interconnection
Sub Title (in English)
Keyword(1)
1st Author's Name Ito Daiki
1st Author's Affiliation Yokohama National University(YNU)
2nd Author's Name Takeuchi Naoki
2nd Author's Affiliation Yokohama National University(YNU)
3rd Author's Name Yamanashi Yuki
3rd Author's Affiliation Yokohama National University(YNU)
4th Author's Name Yoshikawa Nobuyuki
4th Author's Affiliation Yokohama National University(YNU)
Date 2019-08-09
Paper # SCE2019-21
Volume (vol) vol.119
Number (no) SCE-164
Page pp.pp.71-74(SCE),
#Pages 4
Date of Issue 2019-08-02 (SCE)