| Presentation | 2019-06-13 A random number generation method for hardware implemented neural networks Sansei Hori, Hakaru Tamukoh, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This study proposes a hardware oriented random number generation method to implement a stochastically neural networks such as restricted Boltzmann machines (RBMs) into field programmable gate arrays (FPGAs). Generally, hardware oriented random number generators (RNGs) employ linear feedback shift registers (LFSRs). However, the RNGs require considerable circuit resources. Therefore, it is difficult to implement a large scale of neural network such as deep neural networks (DNNs) with the RNGs. In the proposed method, we employ the underflow bits from calculations by fixed-point numbers instead of the RNGs to reduce the circuit resources. In this report, we implemented an RBM which employed the proposed method into a software environment and trained the MNIST dataset to evaluate it. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Random number generators / Restricted Boltzmann machines / Digital hardware / FPGA |
| Paper # | SIS2019-1 |
| Date of Issue | 2019-06-06 (SIS) |
| Conference Information | |
| Committee | SIS / IPSJ-AVM / ITE-3DIT |
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| Conference Date | 2019/6/13(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Fukue Culture Center |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Intelligent Multimedia Systems, Applied Enbedded Systems, Three-Dimensional Image Technology (3DIT), etc. |
| Chair | Takayuki Nakachi(NTT) / Sei Naito(KDDI Research, Inc.) / Tsutomu Horikoshi(Shonan Institute of Technology) |
| Vice Chair | Noriaki Suetake(Yamaguchi Univ.) / Tomoaki Kimura(Kanagawa Inst. of Tech.) |
| Secretary | Noriaki Suetake(Tokyo Metropolitan Univ.) / Tomoaki Kimura(Kindai Univ.) / (NTT) / (Tokyo Univ. of Science) |
| Assistant | Hideaki Misawa(National Inst. of Tech., Ube College) / Yukihiro Bandoh(NTT) |
| Paper Information | |
| Registration To | Technical Committee on Smart Info-Media Systems / Special Interest Group on Audio Visual and Multimedia Information Processing / Technical Group on Three-Dimensional Image Technology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A random number generation method for hardware implemented neural networks |
| Sub Title (in English) | |
| Keyword(1) | Random number generators |
| Keyword(2) | Restricted Boltzmann machines |
| Keyword(3) | Digital hardware |
| Keyword(4) | FPGA |
| 1st Author's Name | Sansei Hori |
| 1st Author's Affiliation | Kyushu Institute of Technology(Kyushu Inst. of Tech.) |
| 2nd Author's Name | Hakaru Tamukoh |
| 2nd Author's Affiliation | Kyushu Institute of Technology(Kyushu Inst. of Tech.) |
| Date | 2019-06-13 |
| Paper # | SIS2019-1 |
| Volume (vol) | vol.119 |
| Number (no) | SIS-78 |
| Page | pp.pp.1-4(SIS), |
| #Pages | 4 |
| Date of Issue | 2019-06-06 (SIS) |