Presentation 2019-05-09
Study of new stacked type logic circuit scheme with fabrication technology of 3D flash memory.
Fumiya Suzuki, Shigeyoshi Watanabe,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English)
Paper # RECONF2019-4
Date of Issue 2019-05-02 (RECONF)

Conference Information
Committee RECONF
Conference Date 2019/5/9(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Tokyo Tech Front
Topics (in Japanese) (See Japanese page)
Topics (in English) Reconfigurable system, etc.
Chair Masato Motomura(Tokyo Tech.)
Vice Chair Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(RIKEN)
Secretary Yuichiro Shibata(Hiroshima City Univ.) / Kentaro Sano(e-trees.Japan)
Assistant Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.)

Paper Information
Registration To Technical Committee on Reconfigurable Systems
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Study of new stacked type logic circuit scheme with fabrication technology of 3D flash memory.
Sub Title (in English)
Keyword(1)
1st Author's Name Fumiya Suzuki
1st Author's Affiliation Shonan Institute of technology(Shonan Inst. of Tech.)
2nd Author's Name Shigeyoshi Watanabe
2nd Author's Affiliation Shonan Institute of technology(Shonan Inst. of Tech.)
Date 2019-05-09
Paper # RECONF2019-4
Volume (vol) vol.119
Number (no) RECONF-18
Page pp.pp.17-21(RECONF),
#Pages 5
Date of Issue 2019-05-02 (RECONF)