Presentation 2019-03-07
Analyzing Final Round Key of AES Implemented on Microcomputer using Neural Network
Satoshi Kosugi, Sho Joichi, Ken Ikuta, Takuya Kusaka, Yasuyuki Nogami, Norikazu Takahashi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A side channel attack is an attack method that enable external key estimation by observing secondary information generated during encryption processing on a hardware, or directly performing some process to that. An attack method called a power analysis attack is known as one of the representative a side channel attack. A power analysis attack is an attack method of analyzing a secret key by observing a side channel waveform indicating several differences in power supply voltage generated during encryption processing. In this paper, we propose a new power analysis attack method using a neural network to analyze enormous side channel waveform. Furthermore, we examined the threat of this proposed method by conducting experiments on this proposed method and obtaining the success rate of attacks aimed at estimating the secret keys.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) side channel attack / power analysis attack / neural network
Paper # IT2018-86,ISEC2018-92,WBS2018-87
Date of Issue 2019-02-28 (IT, ISEC, WBS)

Conference Information
Committee IT / ISEC / WBS
Conference Date 2019/3/7(2days)
Place (in Japanese) (See Japanese page)
Place (in English) University of Electro-Communications
Topics (in Japanese) (See Japanese page)
Topics (in English) joint meeting of IT, ISEC, and WBS
Chair Jun Muramatsu(NTT) / Atsushi Fujioka(Kanagawa Univ.) / Minoru Okada(NAIST)
Vice Chair Tadashi Wadayama(Nagoya Inst. of Tech.) / Shiho Moriai(NICT) / Shoichi Hirose(Univ. of Fukui) / Koji Ohuchi(Shizuoka Univ.) / Kenichi Takizawa(NICT)
Secretary Tadashi Wadayama(Nagano Pref Inst. of Tech.) / Shiho Moriai(UEC) / Shoichi Hirose(Tokai Univ.) / Koji Ohuchi(NICT) / Kenichi Takizawa(Ibaraki Univ.)
Assistant Takahiro Yoshida(Yokohama College of Commerce) / Kazunari Omote(Tsukuba Univ.) / Yuuji Suga(IIJ) / Ryohei Nakamura(National Defense Academy) / Duong Quang Thang(NAIST)

Paper Information
Registration To Technical Committee on Information Theory / Technical Committee on Information Security / Technical Committee on Wideband System
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Analyzing Final Round Key of AES Implemented on Microcomputer using Neural Network
Sub Title (in English)
Keyword(1) side channel attack
Keyword(2) power analysis attack
Keyword(3) neural network
1st Author's Name Satoshi Kosugi
1st Author's Affiliation Okayama University(Okayama University)
2nd Author's Name Sho Joichi
2nd Author's Affiliation Okayama University(Okayama University)
3rd Author's Name Ken Ikuta
3rd Author's Affiliation Okayama University(Okayama University)
4th Author's Name Takuya Kusaka
4th Author's Affiliation Okayama University(Okayama University)
5th Author's Name Yasuyuki Nogami
5th Author's Affiliation Okayama University(Okayama University)
6th Author's Name Norikazu Takahashi
6th Author's Affiliation Okayama University(Okayama University)
Date 2019-03-07
Paper # IT2018-86,ISEC2018-92,WBS2018-87
Volume (vol) vol.118
Number (no) IT-477,ISEC-478,WBS-479
Page pp.pp.71-76(IT), pp.71-76(ISEC), pp.71-76(WBS),
#Pages 6
Date of Issue 2019-02-28 (IT, ISEC, WBS)