| 講演名 | 2019-02-27 An Efficient Approach to Recycled FPGA Detection Using WID Variation Modeling Foisal Ahmed(奈良先端大), Michihiro Shintani(奈良先端大), Michiko Inoue(奈良先端大), |
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| 抄録(和) | Recycled field programmable gate arrays (FPGAs) make a significant threat to mission critical systems due to their performance degradation and shorter lifetime caused by aging. In this paper, we propose a novel recycled FPGA detection method based on with-in die (WID) variation modeling. While fresh/recycled classification is carried out using measured frequencies from ring oscillators on FPGA in existing methods, the proposed method exploits model parameters extracted from the WID modeling. The model parameters simply and accurately represent the process variation of each FPGA, and thus the classification performs very well by the simple feature vector. Experimental results using circuit simulation demonstrate that the proposed method achieves 99.6% dimension reduction per FPGA chip with showing 96.0% detection accuracy using one-class support vector machine (SVM); while our silicon results on Xilinx Artix-7 FPGAs demonstrate the model parameters have good distance properties between fresh and aged. |
| 抄録(英) | Recycled field programmable gate arrays (FPGAs) make a significant threat to mission critical systems due to their performance degradation and shorter lifetime caused by aging. In this paper, we propose a novel recycled FPGA detection method based on with-in die (WID) variation modeling. While fresh/recycled classification is carried out using measured frequencies from ring oscillators on FPGA in existing methods, the proposed method exploits model parameters extracted from the WID modeling. The model parameters simply and accurately represent the process variation of each FPGA, and thus the classification performs very well by the simple feature vector. Experimental results using circuit simulation demonstrate that the proposed method achieves 99.6% dimension reduction per FPGA chip with showing 96.0% detection accuracy using one-class support vector machine (SVM); while our silicon results on Xilinx Artix-7 FPGAs demonstrate the model parameters have good distance properties between fresh and aged. |
| キーワード(和) | Recycled detection / Field programmable gate array (FPGA) / Process variation / With-in die process variation / Feature engineering |
| キーワード(英) | Recycled detection / Field programmable gate array (FPGA) / Process variation / With-in die process variation / Feature engineering |
| 資料番号 | DC2018-77 |
| 発行日 | 2019-02-20 (DC) |
| 研究会情報 | |
| 研究会 | DC |
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| 開催期間 | 2019/2/27(から1日開催) |
| 開催地（和） | 機械振興会館 |
| 開催地（英） | Kikai-Shinko-Kaikan Bldg. |
| テーマ（和） | VLSI設計とテストおよび一般 |
| テーマ（英） | VLSI Design and Test, etc. |
| 委員長氏名（和） | 福本 聡(首都大東京) |
| 委員長氏名（英） | Satoshi Fukumoto(Tokyo Metropolitan Univ.) |
| 副委員長氏名（和） | 高橋 寛(愛媛大) |
| 副委員長氏名（英） | Hiroshi Takahashi(Ehime Univ.) |
| 幹事氏名（和） | 金子 晴彦(東工大) / 新井 雅之(日大) |
| 幹事氏名（英） | Haruhiko Kaneko(Tokyo Inst. of Tech.) / Masayuki Arai(Nihon Univ.) |
| 幹事補佐氏名（和） | |
| 幹事補佐氏名（英） | |
| 講演論文情報詳細 | |
| 申込み研究会 | Technical Committee on Dependable Computing |
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| 本文の言語 | ENG |
| タイトル（和） | |
| サブタイトル（和） | |
| タイトル（英） | An Efficient Approach to Recycled FPGA Detection Using WID Variation Modeling |
| サブタイトル（和） | |
| キーワード(1)（和/英） | Recycled detection / Recycled detection |
| キーワード(2)（和/英） | Field programmable gate array (FPGA) / Field programmable gate array (FPGA) |
| キーワード(3)（和/英） | Process variation / Process variation |
| キーワード(4)（和/英） | With-in die process variation / With-in die process variation |
| キーワード(5)（和/英） | Feature engineering / Feature engineering |
| 第 1 著者 氏名（和/英） | Foisal Ahmed / Foisal Ahmed |
| 第 1 著者 所属（和/英） | Nara Institute of Science and Technology(略称：奈良先端大) Nara Institute of Science and Technology(略称：NAIST) |
| 第 2 著者 氏名（和/英） | Michihiro Shintani / Michihiro Shintani |
| 第 2 著者 所属（和/英） | Nara Institute of Science and Technology(略称：奈良先端大) Nara Institute of Science and Technology(略称：NAIST) |
| 第 3 著者 氏名（和/英） | Michiko Inoue / Michiko Inoue |
| 第 3 著者 所属（和/英） | Nara Institute of Science and Technology(略称：奈良先端大) Nara Institute of Science and Technology(略称：NAIST) |
| 発表年月日 | 2019-02-27 |
| 資料番号 | DC2018-77 |
| 巻番号（vol） | vol.118 |
| 号番号（no） | DC-456 |
| ページ範囲 | pp.37-42(DC), |
| ページ数 | 6 |
| 発行日 | 2019-02-20 (DC) |