| Presentation | 2019-03-02 An ultra-light weight implementation of PRINCE-family cryptographic processor Kohei Matsuda, Makoto Nagata, Noriyuki Miura, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | An ultra-light-weight PRINCE cryptographic processor was proposed by Miura, et al. in 2017. In this paper, based on this design methodology, auto design flow using commercial EDA tools is developed. By using EDA tools, a design cost can be suppressed, additionally more efficient design can be achieved. Lightweight ciphers, MIDORI and MANTIS are designed based on proposed methodology and are evaluated operation latency and area efficiency. This MANTIS processor improved 10% operation latency compared with full-custom PRINCE processor. Also, auto-design PRINCE processor can be suppressed layout area of 23% compared with full-custom PRINCE core. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Lightweight Cipher / PRINCE / MANTIS / MIDORI / Hardware Implementation |
| Paper # | VLD2018-137,HWS2018-100 |
| Date of Issue | 2019-02-20 (VLD, HWS) |
| Conference Information | |
| Committee | HWS / VLD |
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| Conference Date | 2019/2/27(4days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Ken Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Chair | Tsutomu Matsumoto(Yokohama National Univ.) / Noriyuki Minegishi(Mitsubishi Electric) |
| Vice Chair | Shinichi Kawamura(Toshiba) / Makoto Ikeda(Univ. of Tokyo) / Nozomu Togawa(Waseda Univ.) |
| Secretary | Shinichi Kawamura(Kobe Univ.) / Makoto Ikeda(SECOM) / Nozomu Togawa(NTT) |
| Assistant | |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An ultra-light weight implementation of PRINCE-family cryptographic processor |
| Sub Title (in English) | |
| Keyword(1) | Lightweight Cipher |
| Keyword(2) | PRINCE |
| Keyword(3) | MANTIS |
| Keyword(4) | MIDORI |
| Keyword(5) | Hardware Implementation |
| 1st Author's Name | Kohei Matsuda |
| 1st Author's Affiliation | Kobe University(Kobe Univ.) |
| 2nd Author's Name | Makoto Nagata |
| 2nd Author's Affiliation | Kobe University(Kobe Univ.) |
| 3rd Author's Name | Noriyuki Miura |
| 3rd Author's Affiliation | Kobe University(Kobe Univ.) |
| Date | 2019-03-02 |
| Paper # | VLD2018-137,HWS2018-100 |
| Volume (vol) | vol.118 |
| Number (no) | VLD-457,HWS-458 |
| Page | pp.pp.261-265(VLD), pp.261-265(HWS), |
| #Pages | 5 |
| Date of Issue | 2019-02-20 (VLD, HWS) |