| Presentation | 2019-02-27 Pattern Matching Based Detection of Wire Congestion from Source Code Description for High Level Synthesis Masato Tatsuoka, Mineo Kaneko, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | When we use a high level synthesis (HLS) tool, the optimization of input code is necessary for obtaining an optimized RTL. In particular, routing congestion is difficult to resolve due to the lack of physical information in HLS phase. In our previous study, we proposed a high-level design flow that performs code optimization by detecting the congested part on the high-level synthesis input model using the source code compiler. In this report, we propose an extension of program dependence graph (PDG) for HLS code analysis and pattern matching on extended PDG as a method of detecting wire congestion. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | program dependence graph / pattern matching / LLVM / high level synthesis |
| Paper # | VLD2018-96,HWS2018-59 |
| Date of Issue | 2019-02-20 (VLD, HWS) |
| Conference Information | |
| Committee | HWS / VLD |
|---|---|
| Conference Date | 2019/2/27(4days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Ken Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Chair | Tsutomu Matsumoto(Yokohama National Univ.) / Noriyuki Minegishi(Mitsubishi Electric) |
| Vice Chair | Shinichi Kawamura(Toshiba) / Makoto Ikeda(Univ. of Tokyo) / Nozomu Togawa(Waseda Univ.) |
| Secretary | Shinichi Kawamura(Kobe Univ.) / Makoto Ikeda(SECOM) / Nozomu Togawa(NTT) |
| Assistant | |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Pattern Matching Based Detection of Wire Congestion from Source Code Description for High Level Synthesis |
| Sub Title (in English) | |
| Keyword(1) | program dependence graph |
| Keyword(2) | pattern matching |
| Keyword(3) | LLVM |
| Keyword(4) | high level synthesis |
| 1st Author's Name | Masato Tatsuoka |
| 1st Author's Affiliation | Japan Advanced Institute of Science and Technology(JAIST) |
| 2nd Author's Name | Mineo Kaneko |
| 2nd Author's Affiliation | Japan Advanced Institute of Science and Technology(JAIST) |
| Date | 2019-02-27 |
| Paper # | VLD2018-96,HWS2018-59 |
| Volume (vol) | vol.118 |
| Number (no) | VLD-457,HWS-458 |
| Page | pp.pp.19-24(VLD), pp.19-24(HWS), |
| #Pages | 6 |
| Date of Issue | 2019-02-20 (VLD, HWS) |