Presentation 2019-02-07
[Invited Talk] Stress Investigation of Annular-Trench-Isolated (ATI) Through Silicon Via (TSV)
Wei Feng, Naoya Watanabe, Haruo Shimamoto, Masahiro Aoyagi, Katsuya Kikuchi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) The methods as parylene substitute of SiO2 as dielectric layer and annular structure lose efficacy for thermal stress reduction with Through Silicon Via (TSV) scaling down. A novel Annular-Trench-Isolated (ATI) TSV structure was proposed to reduce thermal stress level in Si substrate. A ring of Si is remained between the metal core and insulator layer. The ATI TSV was successfully fabricated with two separate etching processes for the insulator parylene-HT trench and the metal solder core. The thermal stress of ATI TSV was investigated by polarized Raman spectroscopy measurements with varying temperature, indicating lower stress level than regular TSV.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Through Silicon Via (TSV)Thermal StressPolarized Raman Spectroscopy Measurements
Paper # SDM2018-93
Date of Issue 2019-01-31 (SDM)

Conference Information
Committee SDM
Conference Date 2019/2/7(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English) Backend / Assembly and Related materials technology
Chair Takahiro Shinada(Tohoku Univ.)
Vice Chair Hiroshige Hirano(TowerJazz Panasonic)
Secretary Hiroshige Hirano(Shizuoka Univ.)
Assistant Takahiro Mori(AIST) / Nobuaki Kobayashi(Nihon Univ.)

Paper Information
Registration To Technical Committee on Silicon Device and Materials
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) [Invited Talk] Stress Investigation of Annular-Trench-Isolated (ATI) Through Silicon Via (TSV)
Sub Title (in English)
Keyword(1) Through Silicon Via (TSV)Thermal StressPolarized Raman Spectroscopy Measurements
1st Author's Name Wei Feng
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
2nd Author's Name Naoya Watanabe
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
3rd Author's Name Haruo Shimamoto
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
4th Author's Name Masahiro Aoyagi
4th Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
5th Author's Name Katsuya Kikuchi
5th Author's Affiliation National Institute of Advanced Industrial Science and Technology(AIST)
Date 2019-02-07
Paper # SDM2018-93
Volume (vol) vol.118
Number (no) SDM-438
Page pp.pp.9-14(SDM),
#Pages 6
Date of Issue 2019-01-31 (SDM)