| Presentation | 2019-01-30 Design and implementation of FPGA measurement feedback system in Coherent Ising Machine Toshimori Honjo, Takahiro Inagaki, Kensuke Inaba, Takuya Ikuta, Hiroki Takesue, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | To solve combinatorial optimization problems, the way to utilize new type of computer that can find ground state of Ising model has been getting attention. Coherent Ising machine is one of such analog computers, that utilizes a network of degenerated optical paramteric oscillators in an optical cavity for solving ground-state-search problems. The interaction between optical pulses is realized by measurment and feedback scheme, which performend in every circulation in the optical cavity. This measurment-and-feedback system requires both real-time processing and large matrix multipuication, thus it is suitable for FPGA application. In this paper, we describe our prototype implementation of a FPGA measurment-and-feedback system. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Coherent Ising Machine / Ising model / measruemnt and feedback / FPGA |
| Paper # | VLD2018-78,CPSY2018-88,RECONF2018-52 |
| Date of Issue | 2019-01-23 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | IPSJ-SLDM / RECONF / VLD / CPSY / IPSJ-ARC |
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| Conference Date | 2019/1/30(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Yutaka Tamiya(Fujitsu Lab.) / Masato Motomura(Hokkaido Univ.) / Noriyuki Minegishi(Mitsubishi Electric) / Koji Nakano(Hiroshima Univ.) / Koji Inoue(Kyushu Univ.) |
| Vice Chair | / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(RIKEN) / Nozomu Togawa(Waseda Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) |
| Secretary | (NEC) / Yuichiro Shibata(Kochi Univ. of Tech.) / Kentaro Sano(NTT) / Nozomu Togawa(Hiroshima City Univ.) / Hidetsugu Irie(e-trees.Japan) / Takashi Miyoshi(NTT) / (Univ. of Aizu) |
| Assistant | / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) |
| Paper Information | |
| Registration To | Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design and implementation of FPGA measurement feedback system in Coherent Ising Machine |
| Sub Title (in English) | |
| Keyword(1) | Coherent Ising Machine |
| Keyword(2) | Ising model |
| Keyword(3) | measruemnt and feedback |
| Keyword(4) | FPGA |
| 1st Author's Name | Toshimori Honjo |
| 1st Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| 2nd Author's Name | Takahiro Inagaki |
| 2nd Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| 3rd Author's Name | Kensuke Inaba |
| 3rd Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| 4th Author's Name | Takuya Ikuta |
| 4th Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| 5th Author's Name | Hiroki Takesue |
| 5th Author's Affiliation | Nippon Telegraph and Telephone Corporation(NTT) |
| Date | 2019-01-30 |
| Paper # | VLD2018-78,CPSY2018-88,RECONF2018-52 |
| Volume (vol) | vol.118 |
| Number (no) | VLD-430,CPSY-431,RECONF-432 |
| Page | pp.pp.37-42(VLD), pp.37-42(CPSY), pp.37-42(RECONF), |
| #Pages | 6 |
| Date of Issue | 2019-01-23 (VLD, CPSY, RECONF) |