IEICE Technical Committee Submission System
Download Link
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

PDF Download Link
Presentation 2006-05-18 11:00
A Study of Mapping Method for Variable Grain Logic Cell Architecture
Ryoichi Yamaguchi, Kazunori Matsuyama, Hideaki Nakayama, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
PDF Download Link Please login to the IEICE Technical Committee Online System (in Japanese).


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan