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| Presentation | 2015-12-14 16:00 Operation verification of neural network using a simplified element by FPGA Nao Nakamura, Ryuhei Morita, Yuki Koga, Hiroki Nakanishi, Sumio Sugisaki, Tomoharu Yokoyama, Koki Watada, Tokiyoshi Matsuda, Mutsumi Kimura (Ryukoku Univ.) |
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| PDF Download Link |  EID2015-23 SDM2015-106 Link to ES Tech. Rep. Archives: EID2015-23 SDM2015-106 |
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