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| Presentation | 2012-07-19 11:35 Design of a 2bit Bit-Slice Half-Precision Floating-Point Multiplier Using SFQ Circuits Yohei Naruse (Kyoto Univ.), Nobutaka Kito (Chukyo Univ.), Naofumi Takagi (Kyoto Univ.) |
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| PDF Download Link |  SCE2012-12 Link to ES Tech. Rep. Archives: SCE2012-12 |
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