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| Presentation | 2022-07-28 13:30 Preliminary evaluation of "SLMLET" chip with RISC-V MP and SLM reconfigurable logic Yosuke Yanai (Keio Univ.), Takuya Kojima (Tokyo Univ.), Hayate Okuhara (NUS.), Hideharu Amano (Keio Univ.), Masahiro Iida (Kumamoto Univ.) |
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| PDF Download Link |  CPSY2022-8 DC2022-8 |
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