Information and Systems-Speech(Date:1995/10/20)

Presentation
表紙

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[Date]1995/10/20
[Paper #]
目次

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[Date]1995/10/20
[Paper #]
A RISC Processor with Pseudo Vector Processing Feature for Parallel Computer

Koji Saito,  Masahiro Hashimoto,  Hideo Sawamoto,  Takashi Kumagai,  Ryo Yamagata,  Eiki Kamada,  Kenji Matsubara,  Masamori Kashiyama,  Toshiko Isobe,  Takashi Hotta,  Tetsuo Nakano,  Teruhisa Shimizu,  Kisaburo Nakazawa,  

[Date]1995/10/20
[Paper #]DSP95-104,ICD95-153
Development of 32-bit RISC Processor Core Family for Embedded Systems

Toru Kobayashi,  Eifumi Chou,  Tomohiro Hori,  Kenji Asai,  Masahiko Hayano,  Mikihiko Kotaka,  Koji Kobayashi,  Mitsuharu Baba,  Yoshikazu Mori,  

[Date]1995/10/20
[Paper #]DSP95-105,ICD95-154
A 0.75-V, 0.7MHz CMOS 32-bit RISC Microprocessor for portable applications

Toshichika SAKAI,  Hiroaki SUZUKI,  Hisao HARIGAI,  Yoichi YANO,  

[Date]1995/10/20
[Paper #]DSP95-106,ICD95-155
High Speed, Low Power FIFO using Dynamic Voltage Sensing Scheme

Yukinaga Imamura,  Minobu Yazawa,  Shiro Hosotani,  Hiroyuki Amishiro,  Keisuke Okada,  

[Date]1995/10/20
[Paper #]DSP95-107,ICD95-156
Present and Trend in LSIs for Multimedia

Hironori YAMAUCHI,  Tetsurou FUJII,  

[Date]1995/10/20
[Paper #]DSP95-108,ICD95-157
Video Signal Processing Oriented Data Driven Processor

Shinichi Yoshida,  Ricardo T. Shichiku,  Yasuhiro Matsuura,  Tsuyoshi Muramatsu,  Toshiya Okamoto,  Souichi Miyata,  

[Date]1995/10/20
[Paper #]DSP95-109,ICD95-158
Consideration on Two-dimensional Domain Description of Digital Beamforming

Takashi SEKIGUCHI,  KLOUCHE-DJEDID Adesselam,  Ryu MIURA,  Yoshio KARASAWA,  

[Date]1995/10/20
[Paper #]DSP95-110,ICD95-159
Moving Average System Identification Using Fourth-Order Cumulants

Maha SHADAYDEH,  Yegui XIAO,  Yoshiaki TADOKORO,  

[Date]1995/10/20
[Paper #]DSP95-111,ICD95-160
A 128-Tap FIR Digital Filter with Centered Coefficient Decoding Architecture

Kazuya Yamanaka,  Sumitaka Takeuchi,  Michiru Hori,  Nobuhiro Miyoshi,  Hiroyuki Amishiro,  Keisuke Okada,  

[Date]1995/10/20
[Paper #]DSP95-112,ICD95-161
A Study on Digital Circuits with Fractal Structures

Satoshi ONODERA,  Masayuki KAWAMATA,  Tatsuo HIGUCHI,  

[Date]1995/10/20
[Paper #]DSP95-113,ICD95-162
Efficient Design of Separable-Denominator Two-Dimensional Digital Filters for Frequency-Domain Specifications Using a Genetic Algorithm

Hidekuni MORIYA,  Masayuki KAWAMATA,  Tatsuo HIGUCHI,  

[Date]1995/10/20
[Paper #]DSP95-114,ICD95-163
Architecture of a Collision Detection VLSI Processor for Intelligent Vehicles Based on a ROM-Type Content-Addressable Memory

Masanori Hariyama,  Michitaka Kameyama,  

[Date]1995/10/20
[Paper #]DSP95-115,ICD95-164
[OTHERS]

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[Date]1995/10/20
[Paper #]