Information and Systems-Speech(Date:1995/10/19)

Presentation
表紙

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[Date]1995/10/19
[Paper #]
目次

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[Date]1995/10/19
[Paper #]
A 64bit Carry Look-ahead CMOS Adder using Modified Carry Select

Hiroyuki Morinaka,  Hiroshi Makino,  Yasunobu Nakase,  Hiroaki Suzuki,  Koichiro Mashiko,  Tadashi Sumi,  

[Date]1995/10/19
[Paper #]DSP95-97,ICD95-146
Leading-zero Anticipatory Logic for High-speed Floating Point Addition

Hiroaki SUZUKI,  Hiroyuki MORINAKA,  Hiroshi MAKINO,  Yasunobu NAKASE,  Koichiro MASHIKO,  Tadashi SUMI,  

[Date]1995/10/19
[Paper #]DSP95-98,ICD95-147
A 286MHz 64-bit Floating Point Multiplier with Enhanced CG Operation

Hiroshi MAKINO,  Hiroaki SUZUKI,  Hiroyuki MORINAKA,  Yasunobu NAKASE,  Koichiro MASHIKO,  Tadashi SUMI,  

[Date]1995/10/19
[Paper #]DSP95-99,ICD95-148
A Multiplier-Accumulator Macro for a 45 MIPS Embedded RISC Processor

Naoka Yano,  Hiroaki Murakami,  Yukio Ootaguro,  Yukio Sugeno,  Maki Ueno,  Yukinori Muroya,  Tsuneo Aramaki,  

[Date]1995/10/19
[Paper #]DSP95-100,ICD95-149
A Shared Radix 2 Division and Square Root Unit Using an Asynchronous Circuit

G. Matsubara,  N. Ide,  S. Suzuki,  

[Date]1995/10/19
[Paper #]DSP95-101,ICD95-150
Optimal Design of a VLSI Parallel Processor with Minimum Delay Time

Masayuki Sasaki,  Michitaka Kameyama,  

[Date]1995/10/19
[Paper #]DSP95-102,ICD95-151
Panel Discussion "Images of a microprocessor after VLIW era"

Yoichi Yano,  Ikuya kawasaki,  Hideki Ando,  Haruyuki Tago,  Michitaka Kameyama,  Jun Iwamura,  

[Date]1995/10/19
[Paper #]DSP95-103,ICD95-152
[OTHERS]

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[Date]1995/10/19
[Paper #]