Information and Systems-Reconfigurable Systems(Date:2019/09/19)

Presentation
A CNN-based Net Wire Length Prediction Method for FPGA Placement Cost Function

Yuki Katsuda(Kyutech),  Ryota Watanabe(Kyutech),  Qian Zhao(Kyutech),  Takaichi Yoshida(Kyutech),  

[Date]2019-09-19
[Paper #]RECONF2019-21
SoC FPGAによる小型自律走行車の位置推定と経路計画の試行

Yuya Kudo(Ritsumeikan Univ.),  Atsushi Takada(Ritsumeikan Univ.),  Tomonori Izumi(Ritsumeikan Univ.),  

[Date]2019-09-19
[Paper #]RECONF2019-24
The Implementation of Binarized YOLO System on Low-cost FPGA

Kaijie Wei(Keio),  Koki Honda(Keio),  Hideharu Amano(Keio),  

[Date]2019-09-19
[Paper #]RECONF2019-32
Implementation of OpenCL-Based FPGA Accelerator for Polynomial Regression

Kentaro Katayama(FUJITSU LAB.),  

[Date]2019-09-19
[Paper #]RECONF2019-25
SoC FPGAを用いた分散処理フレームワークの構築と検証

Ryohei Tsugami(Nagasaki Univ.),  Yuichiro Shibata(Nagasaki Univ.),  

[Date]2019-09-19
[Paper #]RECONF2019-22
Study of logic element placement algorithm with cost function by neural network

Tokio Kamada(Hiroshima City Univ.),  Atsushi Kubota(Hiroshima City Univ.),  Kazuya Tanigawa(Hiroshima City Univ.),  Tetsuo Hironaka(Hiroshima City Univ.),  

[Date]2019-09-19
[Paper #]RECONF2019-23
[Invited Talk] Utilization of Cloud FPGA

Takashi Ogawa(AWS),  

[Date]2019-09-19
[Paper #]RECONF2019-20
[Invited Talk] ZytleBot: Towards FPGA Integration into ROS-based Autonomous Mobile Robots

Yasuhiro Nitta(Kyoto Univ.),  Sou Tamura(Kyoto Univ.),  Hideki Takase(Kyoto Univ.),  

[Date]2019-09-19
[Paper #]RECONF2019-27
Reconfiguration of " Entropy " Concept in Information Theories

Kumon Tokumaru(Writer),  

[Date]2019-09-20
[Paper #]RECONF2019-35
Zynq SoCむけユーザレベルゼロコピーDMAドライバの開発

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[Date]2019-09-20
[Paper #]RECONF2019-29
不揮発性構成メモリを用いた耐故障性粗粒度再構成可能アーキテクチャ

Takeharu Ikezoe(Keio Univ.),  Kojima Takuya(Keio Univ.),  Hideharu Amano(Keio Univ.),  

[Date]2019-09-20
[Paper #]RECONF2019-28
Quantized Neural Networks Library for Exact Hardware Emulation

Masato Kiyama(Kumamoto Univ.),  Yasuhiro Nakahara(Kumamoto Univ.),  Motoki Amagasaki(Kumamoto Univ.),  Masahiro Iida(Kumamoto Univ.),  

[Date]2019-09-20
[Paper #]RECONF2019-33
Multi-threaded High-Level Synthesis for Bandwidth-intensive Applications

Jens Huthmann(RIKEN),  Auter Podobas(RIKEN),  Takaaki Miyajima(RIKEN),  Atsushi Koshiba(RIKEN),  Kentaro Sano(RIKEN),  

[Date]2019-09-20
[Paper #]RECONF2019-30
ステートマシンの状態符号化に着目した異種冗長設計手法

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[Date]2019-09-20
[Paper #]RECONF2019-34
Accurate Pedestrian Detection in Thermal Images for FPGA

Ryosuke Kuramochi(titech),  Masayuki Shimoda(titech),  Youki Sada(titech),  Shimpei Sato(titech),  Hiroki Nakahara(titech),  

[Date]2019-09-20
[Paper #]RECONF2019-26
FPGA Implementation of Image Recognition with Multiple Simple Neural Networks for Higher Performance and Accuracy

Musashi Aoto(Meisei Univ),  Shoya Hirukawa(Meisei Univ),  Yasutaka Wada(Meisei Univ),  Kazutaka Maruyama(Meisei Univ),  

[Date]2019-09-20
[Paper #]RECONF2019-31