Information and Systems-Reconfigurable Systems(Date:2018/05/24)

Presentation
Prototyping of Dynamic Reconfiguration System to Execute Fallback Function Designed by High Level Synthesis

Teruaki Sakata(Hitachi),  Teppei Hirotsu(Hitachi),  

[Date]2018-05-24
[Paper #]RECONF2018-3
Visibility study of CNN implementation using High Speed Serial Optical Interconnection

Juntaro Chikama(Kumamoto Univ.),  Yasuhiro Nakahara(Kumamoto Univ.),  Motoki Amagasaki(Kumamoto Univ.),  Morihiro Kuga(Kumamoto Univ.),  Msahiro Iida(Kumamoto Univ.),  Toshinori Sueyoshi(Kumamoto Univ.),  

[Date]2018-05-24
[Paper #]RECONF2018-7
OpenCLコードから合成したFPGAによる津波シミュレーションの性能評価

Fumiya Kono(UoA),  Naohito Nakasato(UoA),  

[Date]2018-05-24
[Paper #]RECONF2018-2
Wave Front Fetchグラフカットアルゴリズムの FPGA 実装

Ryo Kamasaka(Nagasaki Univ.),  Yuichiro Shibata(Nagasaki Univ.),  Kiyoshi Oguri(Nagasaki Univ.),  

[Date]2018-05-24
[Paper #]RECONF2018-1
An feasibility study of an automatic selection method for SW/HW communication interface in SWORDS framework

Yasuhiro Nitta(Kyoto Univ.),  Hideki Takase(Kyoto Univ.),  Kazuyoshi Takagi(Kyoto Univ.),  Naofumi Takagi(Kyoto Univ.),  

[Date]2018-05-24
[Paper #]RECONF2018-8
A design of autoscale mechanism using high level synthesis tool for autonomous distributed system

Daichi Teruya(TUAT),  Hironori Nakajo(TUAT),  

[Date]2018-05-24
[Paper #]RECONF2018-9
［招待講演］Halide FPGAバックエンドの開発

Akira Maruoka(Fixsters),  

[Date]2018-05-24
[Paper #]RECONF2018-10
［招待講演］インテルStratix 10 FPGAファミリーの紹介と最新状況について

Yukitaka Takemura(Altera),  

[Date]2018-05-24
[Paper #]RECONF2018-4
対数量子化を用いた可変長ビットシリアル型DNNアクセラレータの面積最適化手法

Takumi Kudo(Hokkaido Univ.),  Kodai Ueyoshi(Hokkaido Univ.),  Kota Ando(Hokkaido Univ.),  Ryota Uematsu(Hokkaido Univ.),  Kazutoshi Hirose(Hokkaido Univ.),  Masayuki Ikebe(Hokkaido Univ.),  Tetsuya Asai(Hokkaido Univ.),  Masato Motomura(Hokkaido Univ.),  Shinya Takamaeda(Hokkaido Univ.),  

[Date]2018-05-25
[Paper #]RECONF2018-6
二値化ニューラルネットワークに基づいたハードウェア指向高精度モデルの検討

Yuka Oba(Hokkaido Univ.),  Kota Ando(Hokkaido Univ.),  Kazutoshi Hires(Hokkaido Univ.),  Kodai Ueyoshi(Hokkaido Univ.),  Ryota Uematsu(Hokkaido Univ.),  Takumi Kudo(Hokkaido Univ.),  Keiichi Kurokawa(Socionext),  Masayuki Ikebe(Hokkaido Univ.),  Tetsuya Asai(Hokkaido Univ.),  Masato Motomura(Hokkaido Univ.),  Shinya Takamaeda(Hokkaido Univ.),  

[Date]2018-05-25
[Paper #]RECONF2018-5
IoT向け軽量通信プロトコルのFPGA実装

Ryouhei Tsugami(Nagasaki Univ.),  Yuichiro Shibata(Nagasaki Univ.),  

[Date]2018-05-25
[Paper #]RECONF2018-11
［依頼講演］ROS準拠FPGAコンポーネント技術と応用

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[Date]2018-05-25
[Paper #]RECONF2018-15
Preliminary Evaluation for Multi-FPGA based Distributed Sorting

Ryohei Kobayashi(Univ. of Tsukuba),  Norihisa Fujita(Univ. of Tsukuba),  Yuma Oobata(Univ. of Tsukuba),  Yoshiki Yamaguchi(Univ. of Tsukuba),  Taisuke Boku(Univ. of Tsukuba),  

[Date]2018-05-25
[Paper #]RECONF2018-13
Design of an MTJ-Based Multi-Functional Lookup Table Circuit

Daisuke Suzuki(Tohoku Univ.),  Takahiro Oka(Tohoku Univ.),  Takahiro Hanyu(Tohoku Univ.),  

[Date]2018-05-25
[Paper #]RECONF2018-12
Efficient Object Detection with Event-Driven camera and its implementation on an FPGA

Masayuki Shimoda(titech),  Shimpei Sato(titech),  Hiroki Nakahara(titech),  

[Date]2018-05-25
[Paper #]RECONF2018-17
An Implementation of an Object Detector on an FPGA

Hiroki Nakahara(Titech),  Masayuki Shimoda(Titech),  Shimpei Sato(Titech),  

[Date]2018-05-25
[Paper #]RECONF2018-18
[Invited Lecture] Intelligent processing on robots expected to achieve speed-up and low-power consumption

Hakaru Tamukoh(Kyutech),  Takeshi Nishida(Kyutech),  Yutaro Ishida(Kyutech),  

[Date]2018-05-25
[Paper #]RECONF2018-16
［招待講演］高性能ハードウェアソーティングアクセラレータに関する研究

Kenji Kise(Titech),  

[Date]2018-05-25
[Paper #]RECONF2018-14