Information and Systems-Reconfigurable Systems(Date:2007/01/11)

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[Date]2007/1/11
[Paper #]
目次

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[Date]2007/1/11
[Paper #]
Optimum Code Scheduling for Clustered VLIW DSP Using Pseudo Boolean Satisfiability

Ryo KOBAYASHI,  Yuki MASUI,  Nagisa ISHIURA,  

[Date]2007/1/11
[Paper #]VLD2006-94,CPSY2006-65,RECONF2006-65
Test Suite of C Compilers and Its Generating Tool "testgen"

Yuki UCHIYAMA,  Nobuyuki HIKICHI,  Nagisa ISHIURA,  Yuji NAGAMATSU,  

[Date]2007/1/11
[Paper #]VLD2006-95,CPSY2006-66,RECONF2006-66
Development of C Compiler for Educational Microprocessor COMET II

Ken MATSUDA,  Akira SATO,  Kensuke MORI,  Toshiyuki TSUTSUMI,  

[Date]2007/1/11
[Paper #]VLD2006-96,CPSY2006-67,RECONF2006-67
CoDaMa : An XML-based Framework for Manipulating CDFGs

Shunitsu KOARA,  Youhua SHI,  Nozomu TOGAWA,  Masao YANAGISAWA,  Tatsuo OHTSUKI,  

[Date]2007/1/11
[Paper #]VLD2006-97,CPSY2006-68,RECONF2006-68
Model Checking of Cycle Accurate Hardware Behavior Models with Instantaneous Communication

Hirohisa FUJITA,  Masahiko HAMADA,  Tadaaki TANIMOTO,  Akio NAKATA,  Teruo HIGASHINO,  

[Date]2007/1/11
[Paper #]VLD2006-98,CPSY2006-69,RECONF2006-69
Construction Method for a Circuit by Multiplication

Satoshi YANO,  Hayato HIGUCHI,  Taichi NAGAMOTO,  Yuichiro SHIBATA,  Kiyoshi OGURI,  

[Date]2007/1/11
[Paper #]VLD2006-99,CPSY2006-70,RECONF2006-70
Analysis of design architecture of ePLX (embedded Programmable Logic matriX) and Evaluation of circuit mapping

Tomoo Hishida,  Kouta Ishibashi,  Shun Kimura,  Naoki Okuno,  Mitsutaka Matsumoto,  Hirofumi Nakano,  Takenobu Iwao,  Yoshihiro Okuno,  Kazutami Arimoto,  Tomonori Izumi,  Takeshi Fujino,  

[Date]2007/1/11
[Paper #]VLD2006-100,CPSY2006-71,RECONF2006-71
Implementation of Dynamically Reconfigurable Processor MuCCRA

Takuro NAKAMURA,  Yohei HASEGAWA,  Satoshi TSUTSUMI,  Hiroki MATSUTANI,  Vasutan TUNBUNHENG,  Adepu PARIMALA,  Takashi NISHIMURA,  Masaru KATO,  Shotaro SAITO,  Toru SANO,  Naomi SEKI,  Keiichiro HIRAI,  KAIYI Mao,  Hideharu AMANO,  

[Date]2007/1/11
[Paper #]VLD2006-101,CPSY2006-72,RECONF2006-72
Scheduling Algorithms for Multicast Configuration

Satoshi TSUTSUMI,  Vasutan TUNBUNHENG,  Yohei HASEGAWA,  Hiroki MATSUTANI,  Adepu PARIMALA,  Takuro NAKAMURA,  Takashi NISHIMURA,  Toru SANO,  Masaru KATO,  Shotaro SAITO,  Naomi SEKI,  Keiichiro HIRAI,  KAIYI Mao,  Hideharu AMANO,  

[Date]2007/1/11
[Paper #]VLD2006-102,CPSY2006-73,RECONF2006-73
Adoption and Evaluation of FPGA Partial Reconfiguration for a Run-time Reconfigurable System

Yukinobu KIYOTA,  Taiichiro YATSUNAMI,  Takeru KISANUKI,  Hideaki YOSHIHIRO,  Morihiro KUGA,  Toshinori SUEYOSHI,  

[Date]2007/1/11
[Paper #]VLD2006-103,CPSY2006-74,RECONF2006-74
Design and Implementation of Self Run-time Partial Reconfiguration System

Yohei HORI,  Hiroyuki YOKOYAMA,  Hirofumi SAKANE,  Kenji TODA,  

[Date]2007/1/11
[Paper #]VLD2006-104,CPSY2006-75,RECONF2006-75
A Study of Efficient Context Switching Methods on Dynamically Reconfigurable Hardware

Masaharu YONEDA,  Masaru FUKUSHI,  Susumu HORIGUCHI,  

[Date]2007/1/11
[Paper #]VLD2006-105,CPSY2006-76,RECONF2006-76
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