Information and Systems-Reconfigurable Systems(Date:2005/09/09)

Presentation
表紙

,  

[Date]2005/9/9
[Paper #]
目次

,  

[Date]2005/9/9
[Paper #]
Programmable Numerical Function Generators : Architectures and Synthesis Method

Shinobu NAGAYAMA,  Tsutomu SASAO,  Jon T. BUTLER,  

[Date]2005/9/9
[Paper #]RECONF2005-41
A Proposal of Design Support Tool for Genetic Algorithm Circuits on FPGA

Tatsuhiro TACHIBANA,  Yoshihiro MURATA,  Naoki SHIBATA,  KEIICHI Yasumoto,  Minoru ITO,  

[Date]2005/9/9
[Paper #]RECONF2005-42
A Genetic Approach for Reconfigurable Mesh Connected Processors

Yusuke FUKUSHIMA,  Masaru FUKUSHI,  Susumu HORIGUCHI,  

[Date]2005/9/9
[Paper #]RECONF2005-43
A Method of Low Energy Design Over An Autonomous Reconfiguration Technique

Shigeki IMAI,  Masahiro IIDA,  Toshinori SUEYOSHI,  

[Date]2005/9/9
[Paper #]RECONF2005-44
Evaluation of Granurality on Threshold Voltage Control in Flex Power FPGA

Masakazu HIOKI,  Takashi KAWANAMI,  Toshiyuki TSUTSUMI,  Tadashi NAKAGAWA,  Toshihiro SEKIGAWA,  Hanpei KOIKE,  

[Date]2005/9/9
[Paper #]RECONF2005-45
Study of Optimal Vth Assigning Algorithm in Flex Power FPGA

Takashi KAWANAMI,  Masakazu HIOKI,  Toshiyuki TSUTSUMI,  Tadashi NAKAGAWA,  Toshihiro SEKIGAWA,  Hanpei KOIKE,  

[Date]2005/9/9
[Paper #]RECONF2005-46
Cluster architecture : Reconfigurable signal processing engine for wireless communications

Miyoshi SAITO,  Hisanori FUJISAWA,  Nobuo UJIIE,  Hideki YOSHIZAWA,  

[Date]2005/9/9
[Paper #]RECONF2005-47
A FPGA Based Hardware/Software Co-learning System

Hoang Anh TUAN,  Koichiro NAKAMURA,  Shoichiro NAMBA,  Katsuhiro YAMAZAKI,  Shigeru OYANAGI,  

[Date]2005/9/9
[Paper #]RECONF2005-48
Bio-Inspired Camera System with FPGA

Yoshiki YAMAGUCHI,  Noriyuki AIBE,  Kazuya HAYASHI,  Yorihisa YAMAMOTO,  Ikuo YOSHIHARA,  Moritoshi YASUNAGA,  

[Date]2005/9/9
[Paper #]RECONF2005-49
Discussion on FPGA Implementation of the Extended Euclidean Algorithm over GF(2^<4m>)

Takehiro ITO,  Yuichiro SHIBATA,  Ryuichi HARASAWA,  Kiyoshi OGURI,  

[Date]2005/9/9
[Paper #]RECONF2005-50
A Method of Determining Dynamic Reconfiguration Timing of an FPGA-Based Encryption System by Predicting The Use of Encryption Algorithm

Yuhei NIWA,  Atusi MAEDA,  Yoshinori YAMAGUCHI,  

[Date]2005/9/9
[Paper #]RECONF2005-51
Evaluation of Arithmetic Precision Required for a Reconfigurable Raytracing Machine with Triangle Patches

Shougo NAKAMURA,  Yuichiro SHIBATA,  Kiyoshi OGURI,  

[Date]2005/9/9
[Paper #]RECONF2005-52
複写される方へ

,  

[Date]2005/9/9
[Paper #]
Notice about photocopying

,  

[Date]2005/9/9
[Paper #]
奥付

,  

[Date]2005/9/9
[Paper #]