Information and Systems-Reconfigurable Systems(Date:2005/09/08)

Presentation
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[Date]2005/9/8
[Paper #]
目次

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[Date]2005/9/8
[Paper #]
Place and Route Processing in Back End Compiler for Reconfigurable Architecture 'PARS'

Ryuji HADA,  Takeshi FUKUDA,  Kazuya TANIGAWA,  Akira KOJIMA,  Tetsuo HIRONAKA,  

[Date]2005/9/8
[Paper #]RECONF2005-30
OS Function and Programming Model for Reconfigurable Architecture

Akira KOJIMA,  Tetsuo HINONAKA,  

[Date]2005/9/8
[Paper #]RECONF2005-31
PELOC : An Automatic Place-and-Route Tool for Dynamically Reconfigurable FPGAs : Application to the Flexible Processor

Naoto MIYAMOTO,  Takeshi OHKAWA,  Amir JAMAK,  Khan ASHFAQZZAMAN,  Daisuke IWAMA,  Hiroaki KANTO,  Koji KOTANI,  Shigetoshi SUGAWA,  Tadahiro OHMI,  

[Date]2005/9/8
[Paper #]RECONF2005-32
On LUT Cascade Realizations of FIR Filters Using Arithmetic Decomposition

Tsutomu SASAO,  Yukihiro IGUCHI,  Takahiro SUZUKI,  

[Date]2005/9/8
[Paper #]RECONF2005-33
RoMultiC : Fast and Simple Configuration Data Multicasting Scheme for Coarse Grain Reconfigurable Devices

Vasutan TUNBUNHENG,  Masayasu SUZUKI,  Hideharu AMANO,  

[Date]2005/9/8
[Paper #]RECONF2005-34
Performance and Power Analysis of Time-multiplexed Execution on Dynamically Reconfigurable Processor

Yohei HASEGAWA,  Hideharu AMANO,  Shohei ABE,  Shunsuke KUROTAKI,  Vu MANH TUAN,  

[Date]2005/9/8
[Paper #]RECONF2005-35
A Simulation Platform for Designing Self-Reconfigurable Architecture and its Application for Study on Coarse-Grained Devices

Shinichi KOUYAMA,  Futoshi MORIE,  Kentaro NAKAHARA,  Tomonori IZUMI,  Hiroyuki OCHI,  Yukihiro NAKAMURA,  

[Date]2005/9/8
[Paper #]RECONF2005-36
Development of a partial reconfiguration controller for an embedded processor FPGA

Isao SAKAMOTO,  Takanori SUSAKI,  Hidetomo SHIBAMURA,  Masahiro IIDA,  Morihiro KUGA,  Toshinori SUEYOEHI,  

[Date]2005/9/8
[Paper #]RECONF2005-37
Feasibility study on a run-time reconfigurable MPEG-2 decoder using functional separation

Takeru KISANUKI,  Isao SAKAMOTO,  Hidetomo SHIBAMURA,  Masahiro IIDA,  Morihiro KUGA,  Toshinori SUEYOSHI,  

[Date]2005/9/8
[Paper #]RECONF2005-38
The Control Mechanism of an FPGA-Based Biochemical Simulator ReCSiP

Yasunori OSANA,  Masato YOSHIMI,  Yow IWAOKA,  Toshinori KOJIMA,  Yuri NISHIKAWA,  Akira FUNAHASHI,  Noriko HIROI,  Yuichiro SHIBATA,  Naoki IWANAGA,  Hiroaki KITANO,  Hideharu AMANO,  

[Date]2005/9/8
[Paper #]RECONF2005-39
Building of the SBML System for an FPGA-based Biochemical Simulator

Yow Iwaoka,  Yasunori Osana,  Masato Yoshimi,  Toshinori Kojima,  Yuri Nishikawa,  Akira Hunahashi,  Noriko Hiroi,  Yuichiro Shibata,  Naoki Iwanaga,  Hiroaki Kitano,  Hideharu Amano,  

[Date]2005/9/8
[Paper #]RECONF2005-40
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[Date]2005/9/8
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[Date]2005/9/8
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[Date]2005/9/8
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