Information and Systems-Image Engineering(Date:2021/09/10)

Presentation
A Low-Latency Inference of Randomly Wired Convolutional Neural Networks on an FPGA

Ryosuke Kuramochi(Tokyo Tech),  Hiroki Nakahara(Tokyo Tech),  

[Date]2021-09-10
[Paper #]RECONF2021-17
An FPGA Implementation of neural networks with multi-core structured using high level synthesis

Akira Jinguji(Tokyo Tech),  Hiroki Nakahara(Tokyo Tech),  

[Date]2021-09-10
[Paper #]RECONF2021-18
Convolutional neural network implementations using Vitis AI

Akihiko Ushiroyama(Okayama Univ.),  Nobuya Watanabe(Okayama Univ.),  Akira Nagoya(Okayama Univ.),  Minoru Watanabe(Okayama Univ.),  

[Date]2021-09-10
[Paper #]RECONF2021-19
ガウス過程回帰による多次元データ平均値予測のFPGA実装

Hirokazu Suzuki(Toyohashi Univ. of Tech.),  Seiji Tsutsumi(JAXA),  Yukinori Sato(Toyohashi Univ. of Tech.),  

[Date]2021-09-10
[Paper #]RECONF2021-20
ブロック分割と適応フィルタによる動画像ベース振動成分抽出システムのFPGA実装

Taito Manabe(Nagasaki Univ.),  Kazuya Uetsuhara(Nagasaki Univ.),  Akane Tahara(Nagasaki Univ.),  Yuichiro Shibata(Nagasaki Univ.),  

[Date]2021-09-10
[Paper #]RECONF2021-21
次世代ALICE TPCにおけるクラスタ検出アルゴリズムのFPGA実装と入出力の検討

Kazuya Nagasawa(Univ. of the Ryukyus),  Yuki Matsuyama(NIAS),  Ken Oyama(NIAS),  Taku Gunji(UT),  Yasunori Osana(Univ. of the Ryukyus),  

[Date]2021-09-10
[Paper #]RECONF2021-23
[Invited Talk] Development of a very high-speed, low power computer system for Deep Learning at Preferred Networks

Kei Hiraki(PFN),  

[Date]2021-09-10
[Paper #]
Multi-FPGA Based Hardware Acceleration for Genetic Data Analysis

Imdad Ullah(Keio Univ.),  Akram Ben Ahmed(AIST),  Kazuei Hironaka(Keio Univ.),  Kensuke Iizuka(Keio Univ.),  Hideharu Amano(Keio Univ.),  

[Date]2021-09-10
[Paper #]RECONF2021-24
Parallel Calculation of Local Scores in Bayesian Network Structure Learning using FPGA

Ryota Miyagi(Kyoto Univ.),  Hideki Takase(U. Tokyo/JST),  

[Date]2021-09-10
[Paper #]RECONF2021-22