Information and Systems-Image Engineering(Date:2021/03/25)

Presentation
A Remote Driving System by Using RC Car

Shotaro Takahashi(NITAC),  Hayato Nomura(NITAC),  

[Date]2021-03-25
[Paper #]CPSY2020-52,DC2020-82
The necessity of exploiting various types of memory devices

Hiroyoshi Kodama(F-lab),  Hiroshi Endo(F-lab),  Takahide Yoshikawa(F-lab),  

[Date]2021-03-25
[Paper #]CPSY2020-50,DC2020-80
FPGAによる離散イベント駆動型シミュレータ実装に向けた性能評価

Hayato Mori(Tokai Univ.),  Takefumi Miyoshi(WasaLabo),  Takeshi Ohkawa(Tokai Univ.),  

[Date]2021-03-25
[Paper #]CPSY2020-53,DC2020-83
Scheduling algorithms for sporadic and periodic tasks in multiprocessors

Yuki Mori(Keio Univ.),  Nobuyuki Yamasaki(Keio Univ.),  

[Date]2021-03-25
[Paper #]CPSY2020-54,DC2020-84
A Compaction Offloading Method for LSM-Tree in Storage Disaggregation Architecture

Shun Gokita(Fujitsu Lab),  Jun Kato(Fujitsu Lab),  Masataka Sonoda(Fujitsu Lab),  Osamu Shiraki(Fujitsu Lab),  Makoto Hamaminato(Fujitsu Lab),  

[Date]2021-03-25
[Paper #]CPSY2020-51,DC2020-81
Optimizing Data Transfer between CPU and GPU in Model Parallel Training with Mesh TensorFlow

Hironori Yokote(UEC),  Shinobu Miwa(UEC),  Hayato Yamaki(UEC),  Hiroki Honda(UEC),  

[Date]2021-03-25
[Paper #]CPSY2020-56,DC2020-86
Parallelization and Vectorization of SpMM for Sparse Neural Network

Yuta Tadokoro(Waseda Univ.),  Keiji Kimura(Waseda Univ.),  Hironori Kasahara(Waseda Univ.),  

[Date]2021-03-25
[Paper #]CPSY2020-55,DC2020-85
IPC control mechanism for highly efficient RT-DVFS

Atsushi Santo(Keio Univ.),  Nobuyuki Yamasaki(Keio Univ.),  

[Date]2021-03-26
[Paper #]CPSY2020-65,DC2020-95
A Don't Care Filling Method of Control Signals for Controllers to Enhance Fault Diagnosability at Register Transfer Level

Kohei Tsuchibuchi(Nihon Univ),  Toshinori Hosokawa(Nihon Univ),  Koji Yamazaki(Meiji Univ.),  

[Date]2021-03-26
[Paper #]CPSY2020-62,DC2020-92
A Logic Locking Method Based on Anti-SAT at Register Transfer Level

Atsuya Tsujikawa(Nihon Univ.),  Toshinori Hosokawa(Nihon Univ.),  Masayoshi Yoshimura(Kyoto Sangyo Univ.),  

[Date]2021-03-26
[Paper #]CPSY2020-64,DC2020-94
A Controller Augmentation method to Improving Transition Fault Coverage

Kyohei Iizuka(Nihon Univ),  Toshinori Hosokawa(Nihon Univ),  Hiroshi Yamazaki(Nihon Univ),  Masayoshi Yoshimura(Kyoto Sangyo Univ),  

[Date]2021-03-26
[Paper #]CPSY2020-63,DC2020-93
Optimal placement of coherence directories using memory networks

Yuki Kameyama(Keio Univ.),  Yoshiya Shikama(Keio Univ.),  Naoya Niwa(Keio Univ.),  Michihiro Koibuchi(NII),  Hideharu Amano(Keio Univ.),  

[Date]2021-03-26
[Paper #]CPSY2020-57,DC2020-87
A Neural ODE Based Domain Adaptation Method for Edge Devices

Hiroki Kawakami(Keio Univ.),  Hirohisa Watanabe(Keio Univ.),  Hiroki Matsutani(Keio Univ.),  

[Date]2021-03-26
[Paper #]CPSY2020-67,DC2020-97
A Light-Weight Fine-Tuning Method using OS-ELM for FPGAs

Takeya Yamada(Keio univ.),  Mineto Tsukada(Keio univ.),  Hiroki Matsutani(Keio univ.),  

[Date]2021-03-26
[Paper #]CPSY2020-68,DC2020-98
Unsupervised Recycled FPGA Detection Using Direct Density Ratio Estimation Based on Self-referencing

Yuya Isaka(KGU),  Michihiro Shintani(NAIST),  Foisal Ahmed(PU),  Michiko Inoue(NAIST),  

[Date]2021-03-26
[Paper #]CPSY2020-60,DC2020-90
Prototyping of A Packet Aggregation/Disaggregation Router with FPGA

Shiro Takayama(Aichi Inst. of Tech.),  Naoki Fujieda(Aichi Inst. of Tech.),  Michihiro Aoki(Aichi Inst. of Tech.),  

[Date]2021-03-26
[Paper #]CPSY2020-58,DC2020-88
Performance Evaluation of High-bandwidth Low-latency Approximate Networks with Performance Fluctuation

Shoichi Hirasawa(NII),  Michihiro Koibuchi(NII),  

[Date]2021-03-26
[Paper #]CPSY2020-59,DC2020-89
An Estimation Method of a Defect Types for Suspected Fault Lines in Logical Faulty VLSI Using Neural Networks

Natsuki Ota(Nihon Univ.),  Toshinori Hosokawa(Nihon Univ.),  Koji Yamazaki(Meiji Univ.),  Yukari Yamauchi(Nihon Univ.),  Masayuki Arai(Nihon Univ.),  

[Date]2021-03-26
[Paper #]CPSY2020-61,DC2020-91
Implementation of Versatile Tensor Accelarator (VTA) on the Flow-in-Cloud FPGA system

Kazuei Hironaka(Keio Univ.),  Kensuke Iizuka(Keio Univ.),  Hideharu Amano(Keio Univ.),  

[Date]2021-03-26
[Paper #]CPSY2020-69,DC2020-99
Non Stop Processor with Non Volatile Element

Shota Nakabeppu(Keio Univ.),  Nao Sugiyama(Keio Univ.),  Nobuyuki Yamasaki(Keio Univ.),  Kenta Suzuki(Sony Semiconductor Solutions),  Keizo Hiraga(Sony Semiconductor Solutions),  Yasuo Kanda(Sony Semiconductor Solutions),  

[Date]2021-03-26
[Paper #]CPSY2020-66,DC2020-96