Information and Systems-Image Engineering(Date:2016/05/19)

Presentation
Succinct-Data-Structure Based on Block-Size-Constrained Compression for a Text-Search Accelerator

Masanori Hariyama(Tohoku Univ.),  Hasitha Muthumala Waidyasooriya(Tohoku Univ.),  

[Date]2016-05-19
[Paper #]RECONF2016-2
FPGAを用いたバレーボール選手の動画像追跡

Chengzhe Li(Univ. Tsukuba),  Lai Yoong Yee(Univ. Tsukuba),  Yoshiki Yamaguchi(Univ. Tsukuba),  

[Date]2016-05-19
[Paper #]RECONF2016-6
Optically reconfigurable gate arrary with an optical input

Hiroki Shinba(Shizuoka Univ.),  Shinya Furukawa(Shizuoka Univ.),  Ili Shairah Abdul Halim(MJIIT),  Minoru Watanabe(Shizuoka Univ.),  Fuminori Kobayashi(MJIIT),  

[Date]2016-05-19
[Paper #]RECONF2016-14
Efficiency Execution of Split Circuit in a Scalable Hardware System by Signal Compression

Yoshio Murata(TUAT),  Hironari Yoshiuchi(TUAT),  Hironori Nakajo(TUAT),  

[Date]2016-05-19
[Paper #]RECONF2016-8
Design of an FPGA Platform for Stencil Computation Using OpenCL

Hasitha Muthumala Waidyasooriya(Tohoku Univ.),  Masanori Hariyama(Tohoku Univ.),  

[Date]2016-05-19
[Paper #]RECONF2016-3
Design of an FPGA-based Accelerator for Moleculer Dynamics Using OpenCL

Hasitha Muthumala Waidyasooriya(Tohoku Univ.),  Masanori Hariyama(Tohoku Univ.),  Kota Kasahara(Osaka Univ.),  

[Date]2016-05-19
[Paper #]RECONF2016-4
FPGA Implementation of a Super-Resolution System

Taito Manabe(Nagasaki Univ.),  Yuichiro Shibata(Nagasaki Univ.),  Kiyoshi Oguri(Nagasaki Univ.),  

[Date]2016-05-19
[Paper #]RECONF2016-5
深層畳込みニューラルネットワークに向けたデータ流再構成型演算器アレイアーキテクチャ

Kota Ando(Hokkaido Univ.),  Kentaro Orimo(Hokkaido Univ.),  Kodai Ueyoshi(Hokkaido Univ.),  Tetsuya Asai(Hokkaido Univ.),  Masato Motomura(Hokkaido Univ.),  

[Date]2016-05-19
[Paper #]RECONF2016-7
[Invited Talk] FPGA-based Acceleration of Image Retrieval and its Application to a Document Search System

Hidetoshi Matsumura(Fujitsu Labs),  Masahiko Sugimura(Fujitsu Labs),  Hironobu Yamasaki(Fujitsu Labs),  Yasumoto Tomita(Fujitsu Labs),  Takayuki Baba(Fujitsu Labs),  Yasuhiro Watanabe(Fujitsu Labs),  

[Date]2016-05-19
[Paper #]RECONF2016-1
Sustained Memory Bandwidth and Computing Performance of FPGA-based Parallel Computation for Fluid Simulation

Daichi Tanaka(Tohoku Univ.),  Sano Kentaro(Tohoku Univ.),  Satoru Yamamoto(Tohoku Univ.),  

[Date]2016-05-19
[Paper #]RECONF2016-9
[Invited Talk] Overviews on key technologies to substantialize 'IoT society'

Toshihiro Matsui(NEDO TSC),  Hisashi Sekine(NEDO TSC),  Hideki Hayashi(NEDO TSC),  Hiroaki Ohkubo(NEDO TSC),  Hirotaka Sunaguchi(NEDO TSC),  Naoyuki Matsuo(NEDO TSC),  Yoshitatsu Sato(NEDO TSC),  

[Date]2016-05-19
[Paper #]RECONF2016-16
FPGAによる多重ハッシュを用いた頻出アイテムセットマイニングのストリームプロセッシング

Kasha Yamamoto(Hokkaido Univ.),  Tetsuya Asai(Hokkaido Univ.),  Masato Motomura(Hokkaido Univ.),  

[Date]2016-05-19
[Paper #]RECONF2016-10
Checkpointing and Live-Migration on FPGA-based Supercomputing

Shinya Takamaeda(NAIST),  Vu Hoang Gia(NAIST),  Supasit Kajkamhaeng(NAIST),  

[Date]2016-05-19
[Paper #]RECONF2016-13
A large-scale SIMD architecture

Takahiro Ito(Univ. Tsukuba),  Yoshiki Yamaguchi(Univ. Tsukuba),  Taisuke Boku(Univ. Tsukuba),  Mitsuhisa Sato(RIKEN AICS),  Yuetsu Kodama(RIKEN),  Jinpil Lee(RIKEN),  Junji Yamamoto(Hitachi),  Yaoko Nakagawa(Hitachi),  

[Date]2016-05-19
[Paper #]RECONF2016-12
Fine-grained body bias control to minimize leakage current of CGRA

Hayate Okuhara(Keio Univ.),  Johannes Maximilian Kuehn(Keio Univ.),  Akram Ben Ahmed(Keio Univ.),  Hideharu Amano(Keio Univ.),  

[Date]2016-05-19
[Paper #]RECONF2016-15
Introduction to 2016 FPGA Trax contest

Yasunori Osana(Ryukyus Univ.),  Tomonori Izumi(Ritsumeikan Univ.),  

[Date]2016-05-19
[Paper #]RECONF2016-11
Evaluation of an OpenCL-Based FPGA Accelerator for Phase-Only Correlation

Masanori Hariyama(Tohoku Univ.),  Shunsuke Tatsumi(Tohoku Univ.),  Koichi Ito(Tohoku Univ.),  Takafumi Aoki(Tohoku Univ.),  

[Date]2016-05-20
[Paper #]RECONF2016-21
Evaluation of an OpenCL-Based FPGA Platform for Particle Filter

Masanori Hariyama(Tohoku Univ.),  Shunsuke Tatsumi(Tohoku Univ.),  Norikazu Ikoma(Nippon Institute of Technology),  

[Date]2016-05-20
[Paper #]RECONF2016-22
長期時系列予測が可能な順伝播時系列メモリネットワークのFPGAアーキテクチャ

Kentaro Orimo(Hokkaido Univ.),  Kota Ando(Hokkaido Univ.),  Kodai Ueyoshi(Hokkaido Univ.),  Tetsuya Asai(Hokkaido Univ.),  Masato Motomura(Hokkaido Univ.),  

[Date]2016-05-20
[Paper #]RECONF2016-18
A Sound Field Visualizer with Java-based High Level Synthesis Tool and CoRAM Architecture Synthesis Framework

Daichi Teruya(TUAT),  Daichi Miyazaki(TUAT),  Hironori Nakajo(TUAT),  

[Date]2016-05-20
[Paper #]RECONF2016-20
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