Information and Systems-Image Engineering(Date:2011/10/17)

Presentation
表紙

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[Date]2011/10/17
[Paper #]
目次

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[Date]2011/10/17
[Paper #]
Toward Machine Vision Technology Overcoming the Pixel Resolution Limit : From 3D Vision to Biometric Authentication

Takafumi AOKI,  

[Date]2011/10/17
[Paper #]IE2011-61,SIP2011-62,ICD2011-65
Three-Dimensional Accelerator Architecture for Image Recognition

Shinya UENO,  ERIC Gauthier LOVIC,  Koji INOUE,  Kazuaki MURAKAMI,  

[Date]2011/10/17
[Paper #]IE2011-62,SIP2011-63,ICD2011-66
Architecture of a Dynamically Reconfigurable VLSI Processor Based on Register-Transfer-Level Packet Transfer

Yoshichika FUJIOKA,  Sho TAKIZAWA,  Michitaka KAMEYAMA,  

[Date]2011/10/17
[Paper #]IE2011-63,SIP2011-64,ICD2011-67
An H.264/AVC video encoder LSI for broadcasting infrastructure and its applications

Koyo NITTA,  Mitsuo IKEDA,  Hiroe IWASAKI,  Kazuto KAMIKURA,  Hirohisa JOZAWA,  

[Date]2011/10/17
[Paper #]IE2011-64,SIP2011-65,ICD2011-68
An H.264 Full HD 60i Double Speed Encoder IP Supporting Both MBAFF and Field-Pic Structure

Akira MORIYA,  Hajime MATSUI,  Takaya OGAWA,  Atsushi MOCHIZUKI,  Sho KODAMA,  Kazuyo KANOU,  Hiromitsu NAKAYAMA,  Shinichiro KOTO,  Shunichi ISHIWATA,  

[Date]2011/10/17
[Paper #]IE2011-65,SIP2011-66,ICD2011-69
残差信号アクセラレータによるH.264 CABAC復号器の高速化(プロセッサ,DSP,画像処理技術及び一般)

Gen FUJITA,  Kenji WATANABE,  Toru HOMEMOTO,  Ryoji HASHIMOTO,  

[Date]2011/10/17
[Paper #]IE2011-66,SIP2011-67,ICD2011-70
Improvement of 3D Shape Reconstruction by Position Estimation of Occluding Contours

Akio ISHIKAWA,  Hiroshi SANKOH,  Sei NAITO,  

[Date]2011/10/17
[Paper #]IE2011-67,SIP2011-68,ICD2011-71
Near Infrared Reflected Intensity Based Material Recognition and Its Application

Muhammad ATTAMIMI,  Tomoaki NAKAMURA,  Takayuki NAGAI,  

[Date]2011/10/17
[Paper #]IE2011-68,SIP2011-69,ICD2011-72
A Method for Accurate Estimation of Venous Shapes from Small Picture Signals

Koji KASHIHARA,  Keisuke TAKAHASHI,  Momoyo ITO,  Minoru FUKUMI,  

[Date]2011/10/17
[Paper #]IE2011-69,SIP2011-70,ICD2011-73
A Study on Biometrics Authentication Method Using Features in Utterance

Atsushi SAYO,  Yoshinobu KAJIKAWA,  Mitsuji MUNEYASU,  

[Date]2011/10/17
[Paper #]IE2011-70,SIP2011-71,ICD2011-74
Scan-based Attack against DES Cryptosystems Independent of Scan-structure

HIROKAZU KODERA,  MASAO YANAGISAWA,  NOZOMU TOGAWA,  

[Date]2011/10/17
[Paper #]Vol.2011-SLDM-152 No.11
超高精度画像合成向けヘテロジニアス・メニーコア型アプリケーション・プロセッサ・アーキテクチャ(プロセッサ,DSP,画像処理技術及び一般)

Yukoh Matsumoto,  

[Date]2011/10/17
[Paper #]IE2011-71,SIP2011-72,ICD2011-75
FPGA Platform for Heterogeneous Multicore Processors with MIMD-ALU-array-type Dynamically Reconfigurable Accelerators

Yasuhiro TAKEI,  Hasitha Muthumala WAIDYASOORIYA,  Masanori HARIYAMA,  Michitaka KAMEYAMA,  

[Date]2011/10/17
[Paper #]IE2011-72,SIP2011-73,ICD2011-76
Data-Transfer-Aware Memory Allocation for Dynamically Reconfigurable Accelerators in Heterogeneous Multicore Processors

Yosuke OHBAYASHI,  Hasitha Muthumala WAIDYASOORIYA,  Masanori HARIYAMA,  Michitaka KAMEYAMA,  

[Date]2011/10/17
[Paper #]IE2011-73,SIP2011-74,ICD2011-77
Dynamically reconfigurable vision-chip architecture using a lens array

Yuki KAMIKUBO,  Minoru WATANABE,  Shoji KAWAHITO,  

[Date]2011/10/17
[Paper #]IE2011-74,SIP2011-75,ICD2011-78
Simultaneous Optimization of Cache Way Selection and Code Placement for Reducing the Memory Access Energy Consumption

Junshi TAKATA,  Tohru ISHIHARA,  Koji INOUE,  

[Date]2011/10/17
[Paper #]IE2011-75,SIP2011-76,ICD2011-79
Multiple Supply Voltages aware High-level Synthesis for HDR architecture

SHIN-YA ABE,  MASAO YANAGISAWA,  NOZOMU TOGAWA,  

[Date]2011/10/17
[Paper #]Vol.2011-SLDM-152 No.17
Simultaneous Optimization of a CDFG Structure and a Schedule Based on Super-node Representation

Akira HIRATA,  WAUDYASOORIYA Hasitha MUTHUMALA,  Masanori HARIYAMA,  Michitaka KAMEYAMA,  

[Date]2011/10/17
[Paper #]IE2011-76,SIP2011-77,ICD2011-80
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