Information and Systems-Dependable Computing(Date:2022/03/01)

Presentation
Evaluation of Efficiency for a Method to Locate High Power Consumption with Switching Provability

Ryu Hoshino(Kyutech),  Taiki Utsunomiya(Kyutech),  Kohei Miyase(Kyutech),  Xiaoqing Wen(Kyutech),  Seiji Kajihara(Kyutech),  

[Date]2022-03-01
[Paper #]DC2021-73
Evaluation of Don't Care Filling Method of Control Signals to Enhance Fault Diagnosability for Logic and Timing Fault

Kohei Tsuchibuchi(Nihon Univ),  Xu Haofeng(Nihon Univ),  Yuya Chida(Nihon Univ),  Toshinori Hosokawa(Nihon Univ),  Koji Yamazaki(Meiji Univ),  

[Date]2022-03-01
[Paper #]DC2021-76
State assignment method to improve transition fault coverage for controllers including invalid states

Kyohei Iizuka(Nihon Univ),  Toshinori Hosokawa(Nihon Univ),  Hiroshi Yamazaki(Nihon Univ),  Masayoshi Yoshimura(Kyoto Sangyo Univ),  

[Date]2022-03-01
[Paper #]DC2021-75
An Estimation Method of Defect Types for Multi-cycle Capture Testing Using Artificial Neural Networks and Fault Detection Information

Natsuki Ota(Nihon Univ.),  Toshinori Hosokawa(Nihon Univ.),  Koji Yamazaki(Meiji Univ.),  Masayuki Arai(Nihon Univ.),  Yukari Yamauchi(Nihon Univ.),  

[Date]2022-03-01
[Paper #]DC2021-77
On Correction for Temperature and Voltage Effects in On-Chip Delay Measurement

Takaaki Kato(KIT),  Yousuke Miyake(PRIVATECH),  Seiji Kajihara(KIT),  

[Date]2022-03-01
[Paper #]DC2021-67
SAT-based LFSR Seed Generation for Delay Fault BIST

Kotaro Iwamoto(Oita Univ.),  Satoshi Ohtake(Oita Univ.),  

[Date]2022-03-01
[Paper #]DC2021-74
A TMR-Based Approximate Corrector for Fail-Operational Systems

Mitsuyoshi Ashida(City Univ),  Tomoo Inoue(City Univ),  Hideyuki Ichihara(City Univ),  

[Date]2022-03-01
[Paper #]DC2021-70
コンセンサスアルゴリズムに対するラウンドモデルに基づいた簡易的なテスト・検証手法の提案

Tatsuhiro Tsuchiya(Osaka Univ.),  

[Date]2022-03-01
[Paper #]DC2021-66
A Logic Locking Method based on SFLL-hd at Register Transfer Level

Yohei Noguchi(Kyoto Sangyo Univ.),  Masayoshi Yoshimura(Kyoto Sangyo Univ.),  Atsuya Tsujikawa(Nihon Univ.),  Toshinori Hosokawa(Nihon Univ.),  

[Date]2022-03-01
[Paper #]DC2021-72
Multi-process Automatic Generation System for ADC Using Standard cell

Takumi Fukushima(Tokyo Denki Univ.),  Satoshi Komatsu(Tokyo Denki Univ.),  

[Date]2022-03-01
[Paper #]DC2021-65
Delay Fault Test Pattern Generation of Fault Tolerant Design Using Approximate Computing

Koji Makino(Tokushima Univ.),  Hiroyuki Yotsuyanagi(Tokushima Univ.),  Masaki Hashizume(Tokushima Univ.),  

[Date]2022-03-01
[Paper #]DC2021-71
Applicability Evaluation of the Delay Testable Circuit to PUF

Eisuke Ohama(Tokushima Univ.),  Haruka Chino(Tokushima Univ.),  Hiroyuki Yotuyanagi(Tokushima Univ.),  Masaki Hashizume(Tokushima Univ.),  

[Date]2022-03-01
[Paper #]DC2021-68
CapsNetを用いた多重欠陥ウェハマップ不良パターンの分類に関する一考察

Itsuki Fujita(Tokyo Metro. Univ.),  Masayuki Arai(Nihon Univ.),  Tadakatsu Matsuda(Nihon Univ.),  Yoshikazu Nagamura(Tokyo Metro. Univ.),  Satoshi Fukumoto(Tokyo Metro. Univ.),  

[Date]2022-03-01
[Paper #]DC2021-78
Design of Successive Approximation ADC using Standard Cell Design Flow

Hiroshi Hirano(Tokyo Denki Univ.),  Satoshi Komatsu(Tokyo Denki Univ.),  

[Date]2022-03-01
[Paper #]DC2021-64