Information and Systems-Dependable Computing(Date:2011/04/05)

Presentation
表紙

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[Date]2011/4/5
[Paper #]
目次

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[Date]2011/4/5
[Paper #]
An Approach and Evaluation of Fault Tolerant Sequential Circuits for Simultaneous Occurrence of Multiple Transient Faults

Satoshi FUKUMOTO,  Kenta IMAI,  Hideo KOHINATA,  Masayuki ARAI,  

[Date]2011/4/5
[Paper #]CPSY2011-1,DC2011-1
A Note on Data Compression of Double-Precision Floating-Point Numbers for Massively Parallel Numerical Simulations

Mamoru OHARA,  Takashi YAMAGUCHI,  

[Date]2011/4/5
[Paper #]CPSY2011-2,DC2011-2
A Case Study on Dependable Network-on-Chip Platform for Automotive Applications

Chammika MANNAKKARA,  Daihan WANG,  Vijay HOLIMATH,  Tomohiro YONEDA,  

[Date]2011/4/5
[Paper #]CPSY2011-3,DC2011-3
Tamper LSI Design Methodology Resistant to Malicious Attack

Takeshi FUJINO,  Mitsuru SHIOZAKI,  Masaya Yoshikawa,  

[Date]2011/4/5
[Paper #]CPSY2011-4,DC2011-4
Transient-Fault-Tolerant Out-of-Order Superscalar Processor

Satoshi ARIMA,  Takashi OKADA,  Ryota SHIOYA,  Masahiro GOSHIMA,  Shuichi SAKAI,  

[Date]2011/4/5
[Paper #]CPSY2011-5,DC2011-5
Note on Defect Level Evaluation of Cascaded TMR for Pipeline Processors

Masayuki Arai,  Kazuhiko Iwasaki,  

[Date]2011/4/5
[Paper #]CPSY2011-6,DC2011-6
Highly Flexible Task Tracer IP for the Real-Time OS on FPGA/SoC Environments

Yuji TAKEDA,  Mamoru OHARA,  Tadashi OKABE,  Ken SATO,  

[Date]2011/4/5
[Paper #]CPSY2011-7,DC2011-7
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[Date]2011/4/5
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[Date]2011/4/5
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[Date]2011/4/5
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