Information and Systems-Computer Systems(Date:2019/06/11)

Presentation
Data Compression System of Storage Compatible with High Performance and High Compression Rate

Yusuke Yamaga(Hitachi),  Takaki Matsushita(Hitachi),  Kazuei Hironaka(Hitachi),  Tomohiro Kawaguchi(Hitachi),  

[Date]2019-06-11
[Paper #]CPSY2019-2,DC2019-2
Proposal and Development of Copy Speed Control Method for Non-disruptive Migration between Storage Systems

Akihiro Hara(Hitachi),  Hiroaki Akutsu(Hitachi),  Tomohiro Kawaguchi(Hitachi),  

[Date]2019-06-11
[Paper #]CPSY2019-3,DC2019-3
Accelerating Deep Learning for Multiple GPUs using FPGA Based Switch

Tomoya Itsubo(Keio Univ.),  Kazuma Takemoto(Keio Univ.),  Hiroki Matsutani(Keio Univ.),  

[Date]2019-06-11
[Paper #]CPSY2019-5,DC2019-5
効率的なDNN計算のための無効ニューロン予測手法の評価

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[Date]2019-06-11
[Paper #]CPSY2019-6,DC2019-6
エッジ環境におけるニューラルネットワーク学習軽量化手法の検討

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[Date]2019-06-11
[Paper #]CPSY2019-7,DC2019-7
GPGPUを用いた変分混合ガウスモデルのパラメータ推定高速化

Hiroki Nishimoto(NAIST),  Takashi Nakada(NAIST),  Yasuhiko Nakashima(NAIST),  

[Date]2019-06-11
[Paper #]CPSY2019-1,DC2019-1
Note on Fast SAT-Based SDN Rule Table Partitioning

Ryota Ogasawara(Nihon Univ.),  Masayuki Arai(Nihon Univ.),  

[Date]2019-06-11
[Paper #]CPSY2019-4,DC2019-4
二値化ニューラルネットワークのハードウェア指向精度向上手法の検討

Yuka Oba(Hokkaido Univ.),  Daisuke Murakami(Socionext),  Tatsuya Nakae(Socionext),  Kota Ando(Hokkaido Univ.),  Tetsuya Asai(Hokkaido Univ.),  Masato Motomura(Tokyo Tech),  Shinya Takamaeda(Hokkaido Univ./JST Presto),  

[Date]2019-06-11
[Paper #]CPSY2019-8,DC2019-8
Architectural Support in CGLA for Quick Compilation and Fine Tuning

Yasuhiko Nakashima(NAIST),  

[Date]2019-06-12
[Paper #]CPSY2019-9,DC2019-9
An Implementation of Secure Context Switch for OpenrRISC

Yuichiro Arima(Tokyo Univ.),  Shuichi Sakai(Tokyo Univ.),  Hidetsugu Irie(Tokyo Univ.),  

[Date]2019-06-12
[Paper #]CPSY2019-11,DC2019-11
Detection of Reflected XSS by Using Dynamic Information Flow Tracking

Shunsuke Tsukamoto(Tokyo Univ.),  Shuichi Sakai(Tokyo Univ.),  Hidetsugu Irie(Tokyo Univ.),  

[Date]2019-06-12
[Paper #]CPSY2019-10,DC2019-10
高電磁ノイズの影響を回避するハイブリッド CAN プロトコル・インターリーブモード

Kouji Konomi(Tokyo Metropolitan Univ.),  Shingo Yokoyama(Tokyo Metropolitan Univ.),  Satoshi Fukumoto(Tokyo Metropolitan Univ.),  

[Date]2019-06-12
[Paper #]CPSY2019-12,DC2019-12
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Ryota Ishikawa(Waseda Univ.),  Masashi Tawada(Waseda Univ.),  Masao Yanagisawa(Waseda Univ.),  Nozomu Togawa(Waseda Univ.),  

[Date]2019-06-12
[Paper #]CPSY2019-13,DC2019-13
A Study of an Open-Source Memory Compiler for a Multi-Port Memory

Junichiro Kadomoto(The Univ. of Tokyo),  Hidetsugu Irie(The Univ. of Tokyo),  Shuichi Sakai(The Univ. of Tokyo),  

[Date]2019-06-12
[Paper #]CPSY2019-16,DC2019-16
Accelaration of ART algorithm using Xilinx SDAccel

Okamoto Yasuaki(Keio Univ.),  Amano Hideharu(Keio Univ.),  

[Date]2019-06-12
[Paper #]CPSY2019-14,DC2019-14
Implementation of Multi-agent SLAM

Ryosuke Kazami(Keio Univ.),  Hideharu Amano(Keio Univ.),  

[Date]2019-06-12
[Paper #]CPSY2019-15,DC2019-15