IEICE Technical Committee

Information and Systems-Computer Systems(Date:2018/12/21)

Presentation

A Consideration of Method of Information Sources Terminals' Moving with Covering Problem on Epidemic Communication

Mamoru Takano(Chuo Univ.), Atsushi Kashiwabara(Chuo Univ.), Hiroshi Tamura(Chuo Univ.), Keisuke Nakano(Niigata Univ.), Masakazu Sengoku(Graduate Institute for Entrepreneurial Studies),

[Date]2018-12-21
[Paper #]CAS2018-82,ICD2018-66,CPSY2018-48

A High-Resolution Time-Based Resistance-to-Digital Converter with TDC and Counter

Shuya Nakagawa(Keio Univ.), Kaito Horikoshi(Keio Univ.), Hiroki Ishikuro(Keio Univ.),

[Date]2018-12-21
[Paper #]CAS2018-81,ICD2018-65,CPSY2018-47

Surveying Function of Tourism Assistance Apps in Fujisawa Area

Toshihiro Tachibana(Shonan Inst. of Tech.), Hikaru Habuto(Shonan Inst. of Tech.), Shogo Tanaka(Shonan Inst. of Tech.), Tomohiro Chosa(Shonan Inst. of Tech.), Kei Watanabe(Shonan Inst. of Tech.), Takashi Satake(Shonan Inst. of Tech.),

[Date]2018-12-21
[Paper #]CAS2018-83,ICD2018-67,CPSY2018-49

Accelerating the Held-Karp Algorithm for the symmetric traveling salesman problem

Kazuro Kimura(Osaka Univ.), Shinya Higa(Osaka Univ.), Masao Okita(Osaka Univ.), Fumihiko Ino(Osaka Univ.),

[Date]2018-12-21
[Paper #]CAS2018-84,ICD2018-68,CPSY2018-50

3次元積層型CGRAのためのアプリケーション割り当て手法の検討

Takuya Kojima(Keio Univ.), Hideharu Amano(Keio Univ.),

[Date]2018-12-21
[Paper #]CAS2018-85,ICD2018-69,CPSY2018-51

Developing the evaluation framework of the STRAIGHT architecture

Akifumi Fukuda(UTokyo), Toru Koizumi(UTokyo), Junichiro Kadomoto(UTokyo), Satoshi Nakae(UTokyo), Hidetsugu Irie(UTokyo), Shuichi Sakai(UTokyo),

[Date]2018-12-21
[Paper #]CAS2018-86,ICD2018-70,CPSY2018-52

DC Magnetic Field Based Localization with Single Anchor Coil

Ryo Shirai(Osaka Univ.), Pei Hao Chen(Osaka Univ.), Ryohei Shimizu(Osaka Univ.), Masanori Hashimoto(Osaka Univ.),

[Date]2018-12-21
[Paper #]CAS2018-80,ICD2018-64,CPSY2018-46

Investigation of Design Method of Low-Power 64-QAM Transmitter Employing Backscattering Technique

Kaede Miyauchi(Titech), Noboru Ishihara(Titech), Hiroyuki Ito(Titech),

[Date]2018-12-21
[Paper #]CAS2018-79,ICD2018-63,CPSY2018-45

Power-amplifier-inserted Transversal Filter that Recovers Quantization Noise Power by CMOS Rectifier

Yuto Tanaka(Tokyo University of Science), Yohtaro Umeda(Tokyo University of Science), Kyoya Takano(Tokyo University of Science),

[Date]2018-12-21
[Paper #]CAS2018-78,ICD2018-62,CPSY2018-44

[Poster Presentation] Matching network optimization for wideband millimeter wave CMOS amplifier

Shota Kohara(Hiroshima Univ.), Shuhei Amakawa(Hiroshima Univ.), Takeshi Yoshida(Hiroshima Univ.), Minoru Fujishima(Hiroshima Univ.),

[Date]2018-12-23
[Paper #]CAS2018-95,ICD2018-79,CPSY2018-61

On Reward Sharing for Multi-agent Games Using Deep Reinforcement Learning

Kei Watanabe(Shonan Isnt. of Tech.), Toshihiro Tachibana(Shonan Isnt. of Tech.),

[Date]2018-12-23
[Paper #]CAS2018-107,ICD2018-91,CPSY2018-73

A Study on Input Method of Language in VR Shopping Mall Application

Masayoshi Kawasaki(Shonan Inst. of Tech.), Toshihiro Tachibana(Shonan Inst. of Tech.), Kaya Nagasawa(Shonan Inst. of Tech.),

[Date]2018-12-23
[Paper #]CAS2018-108,ICD2018-92,CPSY2018-74

[Poster Presentation] Proposal of security system using CMOS Image Sensor PUF

Shiori Inoue(Ritsumeikan Univ.), Ryota Issiki(Ritsumeikan Univ.), Shohei Takano(Ritsumeikan Univ.), Masayosi Shirahata(Ritsumeikan Univ.), Shunsuke Okura(Brillnics Inc.), Mitsuru Shiozaki(Ritsumeikan Univ.), Takaya Kubota(Ritsumeikan Univ.), Kenichiro Ishikawa(Brillnics Inc.), Isao Takayanagi(Brillnics Inc.), Takeshi Fujino(Ritsumeikan Univ.),

[Date]2018-12-23
[Paper #]CAS2018-96,ICD2018-80,CPSY2018-62

Design of A 2.5kV Isolation 400Mbps Transformer-based Digital Isolator with High EMI Immunity for Power Electronics Environment

Tsukasa Kagaya(Tokyo Univ.), Koutarou Miyazaki(Tokyo Univ.), Makoto Takamiya(Tokyo Univ.), Takayasu Sakurai(Tokyo Univ.),

[Date]2018-12-23
[Paper #]CAS2018-113,ICD2018-97,CPSY2018-79

[Poster Presentation] A study of influences to lithium-ion battery module degradation by initial variation between cells by computational experiments.

Motoi Nakajima(Ritsumeikan Univ.), Godine Raja Sekhar(Ritsumeikan Univ.), Lei Lin(Ritsumeikan Univ.), Masahito Arima(Ritsumeikan Univ.), Masahiro Fukui(Ritsumeikan Univ.),

[Date]2018-12-23
[Paper #]CAS2018-92,ICD2018-76,CPSY2018-58

[Poster Presentation] A study for accurate motor modeling and calibration of electric vehicles

Kazuki Kuraya(Ritsumeikan Univ.), Haruya Fujii(Ritsumeikan Univ.), Lei Lin(Ritsumeikan Univ.), Masahito Arima(Ritsumeikan Univ.), Masahiro Fukui(Ritsumeikan Univ.),

[Date]2018-12-23
[Paper #]CAS2018-91,ICD2018-75,CPSY2018-57

[Poster Presentation] Design of VLIW processor for embedded applications based on RISC-V 16-bit ISA

Yusuke Mitani(Tokyo Denki Univ.), Shunya Makino(Tokyo Denki Univ.), Hiroaki Kaneko(Tokyo Denki Univ.), Akinori Kanasugi(Tokyo Denki Univ.),

[Date]2018-12-23
[Paper #]CAS2018-93,ICD2018-77,CPSY2018-59

[Poster Presentation] Development of a low-power processor based on RISC-V

Shunya Makino(Tokyo Denki Univ.), Yusuke Mitani(Tokyo Denki Univ.), Hiroaki Kaneko(Tokyo Denki Univ.), Akinori Kanasugi(Tokyo Denki Univ.),

[Date]2018-12-23
[Paper #]CAS2018-94,ICD2018-78,CPSY2018-60

An approximation algorithm with LP rounding for an unsplittable flow edge load factor balancing problem in a flow network

Hikaru Kasuga(Soka Univ.), Norihiko Shinomiya(Soka Univ.),

[Date]2018-12-23
[Paper #]CAS2018-111,ICD2018-95,CPSY2018-77

ホールスラスタ内部解析用PIC法計算のArria 10 SoC FPGAへの実装

Hiroyuki Noda(Keio Univ.), Takaaki Miyajima(RIKEN), Naoyuki Fujita(JAXA), Hideharu Amano(Keio Univ.),

[Date]2018-12-23
[Paper #]CAS2018-109,ICD2018-93,CPSY2018-75