Information and Systems-Computer Systems(Date:2016/03/24)

Presentation
Design and Implementation of VM Secure Processor for Cloud Forensics

Takuya Chida(UTokyo),  Hiroki Taniai(UTokyo),  Mizuki Miyanaga(UTokyo),  Hidetsugu Irie(UTokyo),  Shuichi Sakai(UTokyo),  

[Date]2016-03-24
[Paper #]CPSY2015-143,DC2015-97
New memory management unit of coarse-grained reconfigurable accelerator CMA

Yu Fujita(Keio Univ.),  Koichiro Masuyama(Keio Univ.),  Hideharu Amano(Keio Univ.),  

[Date]2016-03-24
[Paper #]CPSY2015-144,DC2015-98
An Improvement Method of Throughput on Vector Unit of RMT Processor

Tsukasa Matsui(Keio Univ.),  Shuhei Otsuki(Keio Univ.),  Nobuyuki Yamasaki(Keio Univ.),  

[Date]2016-03-24
[Paper #]CPSY2015-145,DC2015-99
Two-Phase Latch Algorithm for Dynamic Time Borrowing: Improvement and Evaluation

Akihito Tsusaka(The Yniv. of Tokyo),  Yuichi Tanikawa(The Yniv. of Tokyo),  Soichiro Hirohata(The Yniv. of Tokyo),  Masahiro Goshima(NII),  Hidetsugu Irie(The Yniv. of Tokyo),  Shuichi Sakai(The Yniv. of Tokyo),  

[Date]2016-03-24
[Paper #]CPSY2015-146,DC2015-100
Blah Blah Blah

Michihiro Koibuchi(NII),  Daichi Fujiki(Keio U),  Kiyo Ishii(AIST),  Ikki Fujiwara(NII),  Hiroki Matsutani(Keio U),  Hideharu Amano(Keio U),  

[Date]2016-03-25
[Paper #]CPSY2015-147,DC2015-101
Towards a Breakdown of a Benchmark Score Without Internal Analysis of the Benchmarking Program

Naoki Matagawa(Tokyo Tech),  Kazuyuki Shudo(Tokyo Tech),  

[Date]2016-03-25
[Paper #]CPSY2015-151,DC2015-105
An Effective Virtual Channel Allocation Method for Deterministic Deadlock-free Routing

Ryuta Kawano(Keio Univ.),  Hiroshi Nakahara(Keio Univ.),  Ikki Fujiwara(NII),  Hiroki Matsutani(Keio Univ.),  Hideharu Amano(Keio Univ.),  Michihiro Koibuchi(NII),  

[Date]2016-03-25
[Paper #]CPSY2015-148,DC2015-102
Combined Watermarking Method for Anonymized Data

Yuichi Nakamura(Keio Univ.),  Hiroaki Nishi(Keio Univ.),  

[Date]2016-03-25
[Paper #]CPSY2015-152,DC2015-106
Route Selection Algorithm for WSN Nodes Considering Power Consumption

Tadanori Matsui(Keio Univ.),  Hiroaki Nishi(Keio Univ.),  

[Date]2016-03-25
[Paper #]CPSY2015-149,DC2015-103
Automated Recommendation Generation Method for Effective Home Appliances Utilization as a HEMS service

Takahiro Hosoe(Keio Univ.),  Hiroaki Nishi(Keio Univ.),  

[Date]2016-03-25
[Paper #]CPSY2015-153,DC2015-107
Design of NoC Router with Virtual Channel for Priority Inversion Problem

Shuhei Otsuki(Keio Univ.),  Daiki Yamazaki(Sony),  Nobuyuki Yamasaki(Keio Univ.),  

[Date]2016-03-25
[Paper #]CPSY2015-150,DC2015-104
Design Evaluation of Low-Latency Handshake Join on FPGA

Masato Yoshimi(UEC),  Yasin Oge(UEC),  Celimuge Wu(UEC),  Tsutomu Yoshinaga(UEC),  

[Date]2016-03-25
[Paper #]CPSY2015-155,DC2015-109
A Study of the Dynamic Power Estimate Method for FPGA Accelerator

Keisuke Fujimoto(NAIST),  Shinya Takamaeda(NAIST),  Yasuhiko Nakashima(NAIST),  

[Date]2016-03-25
[Paper #]CPSY2015-156,DC2015-110
Secure Managing Method of Log File Utilizing Hardware Monitoring of Disk I/O

Kenji Toda(AIST),  Kazukuni Kobara(AIST),  

[Date]2016-03-25
[Paper #]CPSY2015-157,DC2015-111
Hierarchical Cache Strategies for VOD Networks with Popularity Change

Takuma Nakajima(UEC),  Takayuki Shiroma(UEC),  Masato Yoshimi(UEC),  Celimuge Wu(UEC),  Tsutomu Yoshinaga(UEC),  

[Date]2016-03-25
[Paper #]CPSY2015-154,DC2015-108
A consideration on variation correction for fail prediction in LSI test

Ryo Ogawa(NAIST),  Yoshiyuki Nakamura(Renesas Semiconductor Package & Test Solutions),  Michiko Inoue(NAIST),  

[Date]2016-03-25
[Paper #]CPSY2015-158,DC2015-112