Information and Systems-Computer Systems(Date:1998/12/11)

Presentation
表紙

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[Date]1998/12/11
[Paper #]
目次

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[Date]1998/12/11
[Paper #]
ASIC Design Education : Aiming at Chip Fabrication

Tsutomu Miki,  Fuminori Kobayashi,  Takeshi Yamakawa,  

[Date]1998/12/11
[Paper #]VLD98-117,CPSY98-137
An ASIC Design Methodology Using an Integrated Design Tool for FPGAs

K Kobayashi,  H Kanbara,  H Onodera,  K Tamaru,  

[Date]1998/12/11
[Paper #]VLD98-118,CPSY98-138
Panel Discussion : Designer education in universities and corporations : The education university aims, and what corporations expect

Tetsuo HIRONAKA,  Hiroyuki OCHI,  Hiroshi KADOTA,  Morihiro KUGA,  Kazutoshi KOBAYASHI,  Mitsuo HIGUCHI,  Takashi MORIE,  Masakazu YAMASHINA,  

[Date]1998/12/11
[Paper #]VLD98-119,CPSY98-139
Design of a 16-bit Microprocessor for Educational Use with Internal Observation Functions and Its Implementation on a FPGA

Mitsuo OOYAMA,  

[Date]1998/12/11
[Paper #]VLD98-120,CPSY98-140
PiPICO : A microprocessor framework for education of pipelined architectures

Katsunobu Nishimura,  Kazumasa Nukata,  Hideharu Amano,  

[Date]1998/12/11
[Paper #]VLD98-121,CPSY98-141
A reconfigurable signal probing in a real-time emulator for telecommunications

Masaru Katayama,  Atsushi Takahara,  Toshiaki Miyazaki,  

[Date]1998/12/11
[Paper #]VLD98-122,CPSY98-142
Synchronization Controller using CPLD for Workstation Cluster

Kiyoshi Hayakawa,  Satoshi Sekiguchi,  

[Date]1998/12/11
[Paper #]VLD98-123,CPSY98-143
An Implementation and Evaluation of the Assembler and the Compiler for MBP-light

T. Abe,  H. Inoue,  O. minabe,  masaki W,  H. Amano,  

[Date]1998/12/11
[Paper #]VLD98-124,CPSY98-144
Operation and Transfer Binding of Retargetable Compilation for DSP

Yasushi HATTORI,  Nagisa ISHIURA,  Masayuki YAMAGUCHI,  

[Date]1998/12/11
[Paper #]VLD98-125,CPSY98-145
A Hardware/Software Partitioning Method for Process-level System Specification in VHDL

Yoshinori Jodai,  Akira Kitajima,  Yoshinori Takeuchi,  Masaharu Imai,  

[Date]1998/12/11
[Paper #]VLD98-126,CPSY98-146
Design Method for Real-Time Systems using Task Periodicity

Hideaki Fujikake,  Hiroto Yasuura,  

[Date]1998/12/11
[Paper #]VLD98-127,CPSY98-147
A Clock ON/OFF Scheduling for Low Power Multi-Processor Design

Toshihiko YOKOMARU,  Atsushi TAKAHASHI,  Yoji KAJITANI,  

[Date]1998/12/11
[Paper #]VLD98-128,CPSY98-148
Real-Time Task Scheduling for Variable Voltage Processor

Takanori OKUMA,  Tohru ISHIHARA,  Hiroto YASUURA,  

[Date]1998/12/11
[Paper #]VLD98-129,CPSY98-149
An Embedded System Design Methodology with a Flexible System LSI Chip

Akihiko INOUE,  Hiroto YASUURA,  

[Date]1998/12/11
[Paper #]VLD98-130,CPSY98-150
[OTHERS]

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[Date]1998/12/11
[Paper #]