Information and Systems-Computer Systems(Date:1996/08/26)

Presentation
表紙

,  

[Date]1996/8/26
[Paper #]
目次

,  

[Date]1996/8/26
[Paper #]
Architecture and Performance of the Hitachi SR2201 Parallel Processor System

Hiroaki Fujii,  Yoshiko Yasuda,  Hideya Akashi,  Yasuhiro Inagami,  Masamori Kashiyama,  Hideo Wada,  Tsutomu Sumimoto,  Syun Kawabe,  

[Date]1996/8/26
[Paper #]CPSY-96-47
ATTEMPT-1 : A reconfigurable testbed for multiprocessor-chip

M. Okuno,  K. Inoue,  T. Kisuki,  K. Kimura,  T. Terasawa,  H. Amano,  

[Date]1996/8/26
[Paper #]CPSY-96-48
An Evaluation Methodology for MIMD Multicomputers

Daiki Abe,  Akira Sawada,  Tsutomu Yoshinaga,  Takanobu Baba,  

[Date]1996/8/26
[Paper #]CPSY-96-49
A Proposal of HXB/b-HC interconnection network for massively parallel computers

Takeshi SHIMOMURA,  Hiroaki HIRATA,  Haruo NIIMI,  Kiyoshi SHIBAYAMA,  

[Date]1996/8/26
[Paper #]CPSY-96-50
Virtual Network Schemes for Shared-Memory Multiprocessors

Masaru Takesue,  

[Date]1996/8/26
[Paper #]CPSY-96-51
JUMP-1/3 : A workstation cluster with cache coherent distributed shared memory

K Anjo,  N Nishi,  X. Dong,  A. Yoshiyama,  T. Kudoh,  H. Nakajo,  H. Amano,  

[Date]1996/8/26
[Paper #]CPSY-96-52
Preliminary Performance Evaluation of General Purpose Parallel Computer Prototype / OCHANOMIZ-5

Kiyofumi TANAKA,  Jun TSUIKI,  Takashi MATSUMOTO,  Kei HIRAKI,  

[Date]1996/8/26
[Paper #]CPSY-96-53
Implementation of Distributed Shared Memory with Low Cost Hardware : OCHANOMIZ 5

Jun Tsuiki,  Kiyofumi Tanaka,  Takashi Matsumoto,  Kei Hiraki,  

[Date]1996/8/26
[Paper #]CPSY-96-54
Pruning Cache

Katsunobu Nisimura,  Tomohiro Kudoh,  Hiroaki Nishi,  Hideharu Amano,  

[Date]1996/8/26
[Paper #]CPSY-96-55
Examination of Synchronization Mechanisms using Barrier Blocking

Kiyoshi Hayakawa,  Hiroki Honda,  

[Date]1996/8/26
[Paper #]CPSY-96-56
[OTHERS]

,  

[Date]1996/8/26
[Paper #]