Information and Systems-Computer Systems(Date:1994/04/22)

Presentation
表紙

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[Date]1994/4/22
[Paper #]
目次

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[Date]1994/4/22
[Paper #]
Neuron-MOS Multiple-Valued Intelligent Memory Technology

Tadashi Shibata,  / /,  

[Date]1994/4/22
[Paper #]CPSY94-14,FTS94-14,ICD94-14
A Digital Neural Network VLSI RN200 with On-chip Learning Using Stochastic Pulse Encoding

Sugitaka Oteki,  Atsuo Hashimoto,  Toshiyuki Furuta,  Shuuji Motomura,  Takahiro Watanabe,  David G. Stork,  Hirotoshi Eguchi,  

[Date]1994/4/22
[Paper #]CPSY94-15,FTS94-15,ICD94-15
Very-High-Speed Analog Neural Network LSI and Its Application

Shigeki Aisawa,  Kazuhiro Noguchi,  Takao Matsumoto,  

[Date]1994/4/22
[Paper #]CPSY94-16,FTS94-16,ICD94-16
Processing-speed capability of analog neural-network circuits.

Atsushi Kajino,  Yoshihito Amemiya,  

[Date]1994/4/22
[Paper #]CPSY94-17,FTS94-17,ICD94-17
Spatial and Temporal Dynamics of Analog Image-Processing Neuro Chips

Haruo Kobayashi,  Takashi Matsumoto,  Jun Sanekata,  

[Date]1994/4/22
[Paper #]CPSY94-18,FTS94-18,ICD94-18
ANN accelerator by parallel processor based on DSP

Jun Onuki,  Nobukazu Iijima,  Mototaka Sone,  Yukio Yoshida,  

[Date]1994/4/22
[Paper #]CPSY94-19,FTS94-19,ICD94-19
Hand-written Character Recognition by Relative Feature Extracting Optical Neural Network

Yasunori Kuratomi,  Akio Takimoto,  Hiroshi Tsutsui,  Hisahito Ogawa,  

[Date]1994/4/22
[Paper #]CPSY94-20,FTS94-20,ICD94-20
Weight Update Method for Neural Network LSI with Low Bit-Storage Synapses

Tomohisa Kimura,  Takeshi Shima,  

[Date]1994/4/22
[Paper #]CPSY94-21,FTS94-21,ICD94-21
Multimodule associative neural networks suitable for module addition

Masayuki Mochizuki,  Tomoharu Ohsumi,  Masahiro Kajiura,  Yuuichirou Anzai,  

[Date]1994/4/22
[Paper #]CPSY94-22,FTS94-22,ICD94-22
An implementation of a neural network based detailed router on a multiprocessor

Kyotaro Suzuki,  Akira Hanada,  Hideharu Amano,  Yoshiyasu Takefuji,  

[Date]1994/4/22
[Paper #]CPSY94-23,FTS94-23,ICD94-23
Fault-Tolerant Self-Timed System Monochannel

Victor I. Varshavsky,  Vyacheslav B. Marakhovsky,  

[Date]1994/4/22
[Paper #]CPSY94-24,FTS94-24,ICD94-24
A gate model and circuit structure for pulse-driven asynchronous circuits

Yoshio Kameda,  Takashi Nanya,  

[Date]1994/4/22
[Paper #]CPSY94-25,FTS94-25,ICD94-25
Design and Evaluation of Asynchronous Processor TITAC

Yoichiro Ueno,  Akihiro Takamura,  Kunihiko Ozawa,  Hiroto Kagotani,  Masashi Kuwako,  Takashi Nanya,  

[Date]1994/4/22
[Paper #]CPSY94-26,FTS94-26,ICD94-26
[OTHERS]

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[Date]1994/4/22
[Paper #]