Engineering Sciences/NOLTA-VLSI Design Technologies(Date:2006/03/03)

Presentation
表紙

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[Date]2006/3/3
[Paper #]
目次

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[Date]2006/3/3
[Paper #]
Low Power Design of System LSI in the Presence of Leakage Current of MOSFET

Sigeyoshi Watanabe,  

[Date]2006/3/3
[Paper #]VLD2005-122,ICD2005-239
A design platform for battery driven low power systems

Tatsuya KOYAGI,  Hiroyoshi HIRAI,  Chihiro MORI,  Masahiro FUKUI,  

[Date]2006/3/3
[Paper #]VLD2005-123,ICD2005-240
A proposal about the battery lifetime modeling for battery driven systems

Chihiro MORI,  Tatsuya KOYAGI,  Masahiro FUKUI,  

[Date]2006/3/3
[Paper #]VLD2005-124,ICD2005-241
A Simulation Technique of Dynamic Power Supply : Ground Noise in Large-scale Digital LSIs

Toshifumi UEMURA,  Makoto NAGATA,  

[Date]2006/3/3
[Paper #]VLD2005-125,ICD2005-242
Digital Photo Albuming using Descriptive Metadata : MPEG-7 Signal characteristic description tools for MPEG-A Photo Player

Akio YAMADA,  

[Date]2006/3/3
[Paper #]VLD2005-126,ICD2005-243
A Fault Tolerant Look-Up Table Cascade Emulator

Hiroki NAKAHARA,  Tsutomu SASAO,  

[Date]2006/3/3
[Paper #]VLD2005-127,ICD2005-244
A Circuit Design of Reed-Solomon Decoder using Dynamically Reconfigurable Technology

Teruhito TANAKA,  Koji HATADA,  Tetsuya KONISHI,  Yoshikazu ODAJIMA,  Takashi KAMBE,  

[Date]2006/3/3
[Paper #]VLD2005-128,ICD2005-245
Coarse-grained Reconfigurable Hardware with Mapping Mechanisms of Floating Point Operations and Chained Additions

Hidemi AKUTSU,  Shinji KIMURA,  

[Date]2006/3/3
[Paper #]VLD2005-129,ICD2005-246
A reconfigurable circuit to utilize and compensate device variations

Manabu KOTANI,  Kazuya KATSUKI,  Kosuke OGATA,  Kazutoshi KOBAYASHI,  Hidetoshi ONODERA,  

[Date]2006/3/3
[Paper #]VLD2005-130,ICD2005-247
Transitor Sizing for LCD Driver Circuit under Constraint of Charged Pixel Voltage

Takahito IJICHI,  Masanori HASHIMOTO,  Shingo TAKAHASHI,  Syuji TSUKIYAMA,  Isao SHIRAKAWA,  

[Date]2006/3/3
[Paper #]VLD2005-131,ICD2005-248
An On-chip PVT Control System for Worst-caseless Lower Voltage SoC Design

Takayuki GYOHTEN,  Fukashi MOMRISHITA,  Mako OKAMOTO,  Katsumi DOSAKA,  Kazutami ARIMOTO,  

[Date]2006/3/3
[Paper #]VLD2005-132,ICD2005-249
Impact of Three-Dimensional Transistor on the Pattern Area Reduction for ULSI

Shigeyoshi Watanabe,  

[Date]2006/3/3
[Paper #]VLD2005-133,ICD2005-250
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[Date]2006/3/3
[Paper #]
奥付

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[Date]2006/3/3
[Paper #]